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According to Server Base System Architecture (SBSA) specification, the SBSA Generic Watchdog has two stage timeouts: the first signal (WS0) is for alerting the system by interrupt, the second one (WS1) is a real hardware reset. More details about the hardware specification of this device: ARM DEN0029B - Server Base System Architecture (SBSA) This driver can operate ARM SBSA Generic Watchdog as a single stage In the single stage mode, when the timeout is reached, your system will be reset by WS1. The first signal (WS0) is ignored. Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
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| .. | ||
| armada-37xx-wdt.c | ||
| ast_wdt.c | ||
| at91sam9_wdt.c | ||
| bcm6345_wdt.c | ||
| cdns_wdt.c | ||
| cortina_wdt.c | ||
| designware_wdt.c | ||
| ftwdt010_wdt.c | ||
| imx_watchdog.c | ||
| Kconfig | ||
| Makefile | ||
| mpc8xx_wdt.c | ||
| mt7621_wdt.c | ||
| mtk_wdt.c | ||
| omap_wdt.c | ||
| orion_wdt.c | ||
| s5p_wdt.c | ||
| sandbox_wdt.c | ||
| sbsa_gwdt.c | ||
| sp805_wdt.c | ||
| stm32mp_wdt.c | ||
| tangier_wdt.c | ||
| ulp_wdog.c | ||
| wdt-uclass.c | ||
| xilinx_tb_wdt.c | ||
| xilinx_wwdt.c | ||