Bin Meng f2653e8dd9 x86: coreboot: Control I/O port 0xb2 writing via device tree ... Writing 0xcb to I/O port 0xb2 (Advanced Power Management Control) causes U-Boot to hang on QEMU q35 target. We introduce a config option in the device tree "u-boot,no-apm-finalize" under /config node if we don't want to do that. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>		2015-06-04 03:03:18 -06:00
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car.S	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
coreboot.c	x86: coreboot: Control I/O port 0xb2 writing via device tree	2015-06-04 03:03:18 -06:00
Kconfig	x86: coreboot: Move coreboot-specific defines from coreboot.h to Kconfig	2015-01-13 07:25:03 -08:00
Makefile	x86: Use ipchecksum from net/	2015-01-24 06:13:44 -07:00
pci.c	x86: link: Add PCH driver to support SPI Flash	2015-04-29 18:51:50 -06:00
sdram.c	x86: Support machines with >4GB of RAM	2015-04-16 19:27:40 -06:00
tables.c	x86: Use ipchecksum from net/	2015-01-24 06:13:44 -07:00
timestamp.c	x86: coreboot: Set up timer base correctly	2015-01-13 07:25:02 -08:00