Aneesh V f1f2c3ca9f armv7: omap3: leave outer cache enabled ... Mainline kernel for OMAP3 doesn't enable L2 cache It expects L2$ to be enabled by ROM-code/bootloader. Leaving L2$ enabled can be troublesome in cases where the L2 cache is not under CP15 control, such as in Cortex-A9. This problem is explained in detail in the commit dc7100f408 However, this problem doesn't apply to Cortex-A8 because L2$ in Cortex-A8 is under CP15 control and hence the generic armv7 maintenance opertions work for it. As such we can make an exception for OMAP3 and leave the L2$ enabled when we jump to kernel. This is done by removing the strongly-linked implementation of v7_outer_cache_disable() and allowing it to fall back to the weakly linked implementation that doesn't do anything. Signed-off-by: Aneesh V <aneesh@ti.com>		2012-02-27 21:19:25 +01:00
..
arm	armv7: omap3: leave outer cache enabled	2012-02-27 21:19:25 +01:00
avr32	Merge branch 'next' of ../next	2011-12-23 20:53:58 +01:00
blackfin	linkage.h: move from blackfin to common includes	2012-02-12 15:03:26 -05:00
m68k	m68k: fix ambiguous bit testing	2011-12-05 21:55:25 +01:00
microblaze	microblaze: avoid interrupt race conditions	2012-02-23 12:16:04 +01:00
mips	arch/mips/lib/board.c: Fix GCC 4.6 build warning	2011-12-08 21:01:15 +01:00
nds32	nds32/ag101: clean up for SoC related code	2011-11-23 14:05:51 +08:00
nios2	nios2: Offer ft_board_setup() capability and call fdt_fixup_ethernet().	2011-10-30 21:02:43 +08:00
openrisc	openrisc: Add library functions	2012-01-13 21:16:48 +01:00
powerpc	powerpc/8xxx:Add MPH controller support in USB device-tree fixup	2012-02-15 16:50:14 -06:00
sandbox	sandbox: fix compiling of cpu/os.c	2011-12-10 17:56:37 -05:00
sh	Coding Style cleanup	2011-12-19 12:03:40 +01:00
sparc	sparc: fix unused variable warnings	2011-12-05 21:55:24 +01:00
x86	x86: Convert board_init_f_r to a processing loop	2012-01-04 22:53:14 +11:00
.gitignore	update include/asm/ gitignore after move	2010-05-07 00:17:30 +02:00