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BOOTCFG_RSTMUX8 register controls the reset mux associated with the ARM. Timer5(dedicated to ARM) when used as WatchDog timer, the events it generates are routed to the above mux. Following are the 3 events that can controlled bt the reset mux: - Device Reset - An interrupt to the ARM_GIC - An interrupt to the ARM_GIC followed by a device reset. Right now to give a default watchdog behaviour "Device reset" is being selected. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Nishanth Menon <nm@ti.com> |
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.. | ||
include/mach | ||
clock.c | ||
cmd_clock.c | ||
cmd_ddr3.c | ||
cmd_mon.c | ||
cmd_poweroff.c | ||
config.mk | ||
ddr3.c | ||
ddr3_spd.c | ||
init.c | ||
Kconfig | ||
keystone.c | ||
Makefile | ||
mon.c | ||
msmc.c | ||
psc.c |