mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-12 14:23:00 +00:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
127 lines
3 KiB
C
127 lines
3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2016 Freescale Semiconductor, Inc.
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <netdev.h>
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#include <fm_eth.h>
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#include <fsl_dtsec.h>
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#include <fsl_mdio.h>
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#include <malloc.h>
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#include "../common/fman.h"
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int board_eth_init(bd_t *bis)
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{
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#ifdef CONFIG_FMAN_ENET
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int i;
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struct memac_mdio_info dtsec_mdio_info;
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struct memac_mdio_info tgec_mdio_info;
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struct mii_dev *dev;
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u32 srds_s1;
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struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
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srds_s1 = in_be32(&gur->rcwsr[4]) &
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FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK;
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srds_s1 >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT;
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dtsec_mdio_info.regs =
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(struct memac_mdio_controller *)CONFIG_SYS_FM1_DTSEC_MDIO_ADDR;
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dtsec_mdio_info.name = DEFAULT_FM_MDIO_NAME;
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/* Register the 1G MDIO bus */
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fm_memac_mdio_init(bis, &dtsec_mdio_info);
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tgec_mdio_info.regs =
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(struct memac_mdio_controller *)CONFIG_SYS_FM1_TGEC_MDIO_ADDR;
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tgec_mdio_info.name = DEFAULT_FM_TGEC_MDIO_NAME;
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/* Register the 10G MDIO bus */
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fm_memac_mdio_init(bis, &tgec_mdio_info);
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/* Set the two on-board RGMII PHY address */
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fm_info_set_phy_address(FM1_DTSEC3, RGMII_PHY1_ADDR);
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fm_info_set_phy_address(FM1_DTSEC4, RGMII_PHY2_ADDR);
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/* Set the two on-board SGMII PHY address */
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fm_info_set_phy_address(FM1_DTSEC5, SGMII_PHY1_ADDR);
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fm_info_set_phy_address(FM1_DTSEC6, SGMII_PHY2_ADDR);
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/* Set the on-board AQ PHY address */
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fm_info_set_phy_address(FM1_10GEC1, FM1_10GEC1_PHY_ADDR);
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switch (srds_s1) {
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case 0x1133:
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break;
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default:
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printf("Invalid SerDes protocol 0x%x for LS1046ARDB\n",
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srds_s1);
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break;
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}
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dev = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME);
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for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++)
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fm_info_set_mdio(i, dev);
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/* XFI on lane A, MAC 9 */
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dev = miiphy_get_dev_by_name(DEFAULT_FM_TGEC_MDIO_NAME);
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fm_info_set_mdio(FM1_10GEC1, dev);
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cpu_eth_init(bis);
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#endif
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return pci_eth_init(bis);
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}
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#ifdef CONFIG_FMAN_ENET
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int fdt_update_ethernet_dt(void *blob)
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{
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u32 srds_s1;
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int i, prop;
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int offset, nodeoff;
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const char *path;
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struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
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srds_s1 = in_be32(&gur->rcwsr[4]) &
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FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK;
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srds_s1 >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT;
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/* Cycle through all aliases */
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for (prop = 0; ; prop++) {
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const char *name;
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/* FDT might have been edited, recompute the offset */
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offset = fdt_first_property_offset(blob,
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fdt_path_offset(blob,
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"/aliases")
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);
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/* Select property number 'prop' */
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for (i = 0; i < prop; i++)
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offset = fdt_next_property_offset(blob, offset);
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if (offset < 0)
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break;
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path = fdt_getprop_by_offset(blob, offset, &name, NULL);
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nodeoff = fdt_path_offset(blob, path);
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switch (srds_s1) {
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case 0x1133:
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if (!strcmp(name, "ethernet0"))
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fdt_status_disabled(blob, nodeoff);
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if (!strcmp(name, "ethernet1"))
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fdt_status_disabled(blob, nodeoff);
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break;
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default:
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printf("%s: Invalid SerDes prtcl 0x%x for LS1046ARDB\n",
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__func__, srds_s1);
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break;
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}
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}
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return 0;
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}
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#endif
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