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bbda2ed584
Common PLL setup function, compatible with different SOC. Mainly for the subsequent new SOC use. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
16 lines
567 B
Makefile
16 lines
567 B
Makefile
# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (c) 2017 Rockchip Electronics Co., Ltd
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#
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obj-y += clk_pll.o
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obj-$(CONFIG_ROCKCHIP_PX30) += clk_px30.o
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obj-$(CONFIG_ROCKCHIP_RK3036) += clk_rk3036.o
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obj-$(CONFIG_ROCKCHIP_RK3128) += clk_rk3128.o
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obj-$(CONFIG_ROCKCHIP_RK3188) += clk_rk3188.o
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obj-$(CONFIG_ROCKCHIP_RK322X) += clk_rk322x.o
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obj-$(CONFIG_ROCKCHIP_RK3288) += clk_rk3288.o
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obj-$(CONFIG_ROCKCHIP_RK3328) += clk_rk3328.o
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obj-$(CONFIG_ROCKCHIP_RK3368) += clk_rk3368.o
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obj-$(CONFIG_ROCKCHIP_RK3399) += clk_rk3399.o
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obj-$(CONFIG_ROCKCHIP_RV1108) += clk_rv1108.o
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