mirror of
https://github.com/AsahiLinux/u-boot
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d2c3197922
Add support for Microchip LAN7500, LAN7800 and LAN7850, USB to 10/100/1000 Ethernet Controllers. Signed-off-by: Yuiko Oshino <yuiko.oshino@microchip.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
315 lines
7.4 KiB
C
315 lines
7.4 KiB
C
/*
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* Copyright (c) 2017 Microchip Technology Inc. All rights reserved.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <dm.h>
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#include <usb.h>
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#include <linux/mii.h>
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#include "usb_ether.h"
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#include "lan7x.h"
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/* LAN75xx specific register/bit defines */
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#define LAN75XX_HW_CFG_BIR BIT(7)
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#define LAN75XX_BURST_CAP 0x034
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#define LAN75XX_BULK_IN_DLY 0x03C
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#define LAN75XX_RFE_CTL 0x060
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#define LAN75XX_FCT_RX_CTL 0x090
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#define LAN75XX_FCT_TX_CTL 0x094
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#define LAN75XX_FCT_RX_FIFO_END 0x098
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#define LAN75XX_FCT_TX_FIFO_END 0x09C
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#define LAN75XX_FCT_FLOW 0x0A0
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/* MAC ADDRESS PERFECT FILTER For LAN75xx */
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#define LAN75XX_ADDR_FILTX 0x300
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#define LAN75XX_ADDR_FILTX_FB_VALID BIT(31)
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/*
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* Lan75xx infrastructure commands
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*/
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static int lan75xx_phy_gig_workaround(struct usb_device *udev,
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struct ueth_data *dev)
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{
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int ret = 0;
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/* Only internal phy */
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/* Set the phy in Gig loopback */
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lan7x_mdio_write(udev, dev->phy_id, MII_BMCR,
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(BMCR_LOOPBACK | BMCR_SPEED1000));
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/* Wait for the link up */
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ret = lan7x_mdio_wait_for_bit(udev, "BMSR_LSTATUS",
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dev->phy_id, MII_BMSR, BMSR_LSTATUS,
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true, PHY_CONNECT_TIMEOUT_MS, 1);
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if (ret)
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return ret;
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/* phy reset */
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return lan7x_pmt_phy_reset(udev, dev);
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}
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static int lan75xx_update_flowcontrol(struct usb_device *udev,
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struct ueth_data *dev)
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{
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uint32_t flow = 0, fct_flow = 0;
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int ret;
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ret = lan7x_update_flowcontrol(udev, dev, &flow, &fct_flow);
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if (ret)
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return ret;
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ret = lan7x_write_reg(udev, LAN75XX_FCT_FLOW, fct_flow);
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if (ret)
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return ret;
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return lan7x_write_reg(udev, FLOW, flow);
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}
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static int lan75xx_set_receive_filter(struct usb_device *udev)
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{
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/* No multicast in u-boot */
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return lan7x_write_reg(udev, LAN75XX_RFE_CTL,
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RFE_CTL_BCAST_EN | RFE_CTL_DA_PERFECT);
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}
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/* starts the TX path */
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static void lan75xx_start_tx_path(struct usb_device *udev)
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{
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/* Enable Tx at MAC */
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lan7x_write_reg(udev, MAC_TX, MAC_TX_TXEN);
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/* Enable Tx at SCSRs */
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lan7x_write_reg(udev, LAN75XX_FCT_TX_CTL, FCT_TX_CTL_EN);
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}
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/* Starts the Receive path */
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static void lan75xx_start_rx_path(struct usb_device *udev)
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{
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/* Enable Rx at MAC */
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lan7x_write_reg(udev, MAC_RX,
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LAN7X_MAC_RX_MAX_SIZE_DEFAULT |
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MAC_RX_FCS_STRIP | MAC_RX_RXEN);
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/* Enable Rx at SCSRs */
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lan7x_write_reg(udev, LAN75XX_FCT_RX_CTL, FCT_RX_CTL_EN);
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}
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static int lan75xx_basic_reset(struct usb_device *udev,
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struct ueth_data *dev,
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struct lan7x_private *priv)
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{
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int ret;
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u32 val;
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ret = lan7x_basic_reset(udev, dev);
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if (ret)
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return ret;
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/* Keep the chip ID */
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ret = lan7x_read_reg(udev, ID_REV, &val);
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if (ret)
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return ret;
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debug("LAN75xx ID_REV = 0x%08x\n", val);
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priv->chipid = (val & ID_REV_CHIP_ID_MASK) >> 16;
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/* Respond to the IN token with a NAK */
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ret = lan7x_read_reg(udev, HW_CFG, &val);
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if (ret)
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return ret;
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val |= LAN75XX_HW_CFG_BIR;
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return lan7x_write_reg(udev, HW_CFG, val);
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}
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int lan75xx_write_hwaddr(struct udevice *dev)
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{
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struct usb_device *udev = dev_get_parent_priv(dev);
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struct eth_pdata *pdata = dev_get_platdata(dev);
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unsigned char *enetaddr = pdata->enetaddr;
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u32 addr_lo = get_unaligned_le32(&enetaddr[0]);
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u32 addr_hi = (u32)get_unaligned_le16(&enetaddr[4]);
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int ret;
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/* set hardware address */
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ret = lan7x_write_reg(udev, RX_ADDRL, addr_lo);
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if (ret)
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return ret;
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ret = lan7x_write_reg(udev, RX_ADDRH, addr_hi);
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if (ret)
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return ret;
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ret = lan7x_write_reg(udev, LAN75XX_ADDR_FILTX + 4, addr_lo);
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if (ret)
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return ret;
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addr_hi |= LAN75XX_ADDR_FILTX_FB_VALID;
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ret = lan7x_write_reg(udev, LAN75XX_ADDR_FILTX, addr_hi);
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if (ret)
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return ret;
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debug("MAC addr %pM written\n", enetaddr);
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return 0;
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}
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static int lan75xx_eth_start(struct udevice *dev)
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{
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struct usb_device *udev = dev_get_parent_priv(dev);
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struct lan7x_private *priv = dev_get_priv(dev);
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struct ueth_data *ueth = &priv->ueth;
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int ret;
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u32 write_buf;
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/* Reset and read Mac addr were done in probe() */
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ret = lan75xx_write_hwaddr(dev);
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if (ret)
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return ret;
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ret = lan7x_write_reg(udev, INT_STS, 0xFFFFFFFF);
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if (ret)
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return ret;
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ret = lan7x_write_reg(udev, LAN75XX_BURST_CAP, 0);
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if (ret)
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return ret;
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ret = lan7x_write_reg(udev, LAN75XX_BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
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if (ret)
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return ret;
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/* set FIFO sizes */
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write_buf = (MAX_RX_FIFO_SIZE - 512) / 512;
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ret = lan7x_write_reg(udev, LAN75XX_FCT_RX_FIFO_END, write_buf);
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if (ret)
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return ret;
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write_buf = (MAX_TX_FIFO_SIZE - 512) / 512;
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ret = lan7x_write_reg(udev, LAN75XX_FCT_TX_FIFO_END, write_buf);
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if (ret)
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return ret;
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/* Init Tx */
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ret = lan7x_write_reg(udev, FLOW, 0);
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if (ret)
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return ret;
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/* Init Rx. Set Vlan, keep default for VLAN on 75xx */
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ret = lan75xx_set_receive_filter(udev);
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if (ret)
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return ret;
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/* phy workaround for gig link */
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ret = lan75xx_phy_gig_workaround(udev, ueth);
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if (ret)
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return ret;
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/* Init PHY, autonego, and link */
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ret = lan7x_eth_phylib_connect(dev, &priv->ueth);
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if (ret)
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return ret;
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ret = lan7x_eth_phylib_config_start(dev);
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if (ret)
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return ret;
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/*
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* MAC_CR has to be set after PHY init.
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* MAC will auto detect the PHY speed.
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*/
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ret = lan7x_read_reg(udev, MAC_CR, &write_buf);
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if (ret)
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return ret;
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write_buf |= MAC_CR_AUTO_DUPLEX | MAC_CR_AUTO_SPEED | MAC_CR_ADP;
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ret = lan7x_write_reg(udev, MAC_CR, write_buf);
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if (ret)
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return ret;
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lan75xx_start_tx_path(udev);
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lan75xx_start_rx_path(udev);
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return lan75xx_update_flowcontrol(udev, ueth);
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}
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int lan75xx_read_rom_hwaddr(struct udevice *dev)
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{
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struct usb_device *udev = dev_get_parent_priv(dev);
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struct eth_pdata *pdata = dev_get_platdata(dev);
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int ret;
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/*
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* Refer to the doc/README.enetaddr and doc/README.usb for
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* the U-Boot MAC address policy
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*/
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ret = lan7x_read_eeprom_mac(pdata->enetaddr, udev);
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if (ret)
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memset(pdata->enetaddr, 0, 6);
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return 0;
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}
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static int lan75xx_eth_probe(struct udevice *dev)
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{
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struct usb_device *udev = dev_get_parent_priv(dev);
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struct lan7x_private *priv = dev_get_priv(dev);
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struct ueth_data *ueth = &priv->ueth;
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struct eth_pdata *pdata = dev_get_platdata(dev);
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int ret;
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/* Do a reset in order to get the MAC address from HW */
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if (lan75xx_basic_reset(udev, ueth, priv))
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return 0;
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/* Get the MAC address */
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/*
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* We must set the eth->enetaddr from HW because the upper layer
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* will force to use the environmental var (usbethaddr) or random if
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* there is no valid MAC address in eth->enetaddr.
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*
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* Refer to the doc/README.enetaddr and doc/README.usb for
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* the U-Boot MAC address policy
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*/
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lan7x_read_eeprom_mac(pdata->enetaddr, udev);
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/* Do not return 0 for not finding MAC addr in HW */
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ret = usb_ether_register(dev, ueth, RX_URB_SIZE);
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if (ret)
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return ret;
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/* Register phylib */
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return lan7x_phylib_register(dev);
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}
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static const struct eth_ops lan75xx_eth_ops = {
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.start = lan75xx_eth_start,
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.send = lan7x_eth_send,
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.recv = lan7x_eth_recv,
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.free_pkt = lan7x_free_pkt,
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.stop = lan7x_eth_stop,
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.write_hwaddr = lan75xx_write_hwaddr,
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.read_rom_hwaddr = lan75xx_read_rom_hwaddr,
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};
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U_BOOT_DRIVER(lan75xx_eth) = {
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.name = "lan75xx_eth",
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.id = UCLASS_ETH,
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.probe = lan75xx_eth_probe,
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.remove = lan7x_eth_remove,
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.ops = &lan75xx_eth_ops,
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.priv_auto_alloc_size = sizeof(struct lan7x_private),
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.platdata_auto_alloc_size = sizeof(struct eth_pdata),
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};
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static const struct usb_device_id lan75xx_eth_id_table[] = {
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{ USB_DEVICE(0x0424, 0x7500) }, /* LAN7500 USB Ethernet */
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{ } /* Terminating entry */
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};
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U_BOOT_USB_DEVICE(lan75xx_eth, lan75xx_eth_id_table);
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