Stephen George f110fe940c powerpc/85xx: Adding configuration for DCSRCR to enable 32M access ... Configuring DCSRCR to define the DCSR space to be 1G instead of the default 4M. DCSRCR only allows selection of either 4M or 1G. Most DCSR registers are within 4M but the Nexus trace buffer is located at offset 16M within the DCSR. Configuring the LAW to be 32M to allow access to the Nexus trace buffer. No TLB modification is required since accessing the Nexus trace buffer from within u-boot is not required. Signed-off-by: Stephen George <stephen.george@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>		2011-07-29 08:53:37 -05:00
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74xx_7xx	unify version_string	2011-07-28 17:22:53 +02:00
mpc5xx	unify version_string	2011-07-28 17:22:53 +02:00
mpc5xxx	unify version_string	2011-07-28 17:22:53 +02:00
mpc8xx	unify version_string	2011-07-28 17:22:53 +02:00
mpc8xxx	powerpc/85xx: Fix detection of P1017E	2011-07-17 10:33:05 -05:00
mpc83xx	unify version_string	2011-07-28 17:22:53 +02:00
mpc85xx	powerpc/85xx: Adding configuration for DCSRCR to enable 32M access	2011-07-29 08:53:37 -05:00
mpc86xx	unify version_string	2011-07-28 17:22:53 +02:00
mpc512x	unify version_string	2011-07-28 17:22:53 +02:00
mpc824x	unify version_string	2011-07-28 17:22:53 +02:00
mpc8220	unify version_string	2011-07-28 17:22:53 +02:00
mpc8260	unify version_string	2011-07-28 17:22:53 +02:00
ppc4xx	unify version_string	2011-07-28 17:22:53 +02:00