mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-11 13:56:30 +00:00
07dea2e737
Migrate the CONFIG_FSL_ESDHC option to Kconfig. Signed-off-by: Mario Six <mario.six@gdsys.cc>
185 lines
4.7 KiB
C
185 lines
4.7 KiB
C
/*
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* DHCOM DH-iMX6 PDK board configuration
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*
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* Copyright (C) 2017 Marek Vasut <marex@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __DH_IMX6_CONFIG_H
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#define __DH_IMX6_CONFIG_H
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#include <asm/arch/imx-regs.h>
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#include "mx6_common.h"
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/*
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* SPI NOR layout:
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* 0x00_0000-0x00_ffff ... U-Boot SPL
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* 0x01_0000-0x0f_ffff ... U-Boot
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* 0x10_0000-0x10_ffff ... U-Boot env #1
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* 0x11_0000-0x11_ffff ... U-Boot env #2
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* 0x12_0000-0x1f_ffff ... UNUSED
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*/
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/* SPL */
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#include "imx6_spl.h" /* common IMX6 SPL configuration */
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#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x11400
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#define CONFIG_SPL_SPI_LOAD
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#define CONFIG_SPL_TARGET "u-boot-with-spl.imx"
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/* Miscellaneous configurable options */
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_REVISION_TAG
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#define CONFIG_BOUNCE_BUFFER
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#define CONFIG_BZIP2
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (4 * SZ_1M)
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/* Bootcounter */
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#define CONFIG_SYS_BOOTCOUNT_BE
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/* FEC ethernet */
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#define CONFIG_MII
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#define IMX_FEC_BASE ENET_BASE_ADDR
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#define CONFIG_FEC_XCV_TYPE RMII
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#define CONFIG_ETHPRIME "FEC"
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#define CONFIG_FEC_MXC_PHYADDR 0
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#define CONFIG_ARP_TIMEOUT 200UL
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/* Fuses */
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#ifdef CONFIG_CMD_FUSE
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#define CONFIG_MXC_OCOTP
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#endif
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/* I2C Configs */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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/* MMC Configs */
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#define CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_FSL_USDHC_NUM 3
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#define CONFIG_SYS_MMC_ENV_DEV 2 /* 1 = SDHC3, 2 = SDHC4 (eMMC) */
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/* SATA Configs */
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#ifdef CONFIG_CMD_SATA
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#define CONFIG_SYS_SATA_MAX_DEVICE 1
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#define CONFIG_DWC_AHSATA_PORT_ID 0
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#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
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#define CONFIG_LBA48
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#endif
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/* SPI Flash Configs */
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#ifdef CONFIG_CMD_SF
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#define CONFIG_SF_DEFAULT_BUS 0
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#define CONFIG_SF_DEFAULT_CS 0
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#define CONFIG_SF_DEFAULT_SPEED 25000000
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#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
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#endif
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/* UART */
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_BASE
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#define CONFIG_BAUDRATE 115200
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/* USB Configs */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
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/* USB Gadget (DFU, UMS) */
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#if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE)
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#define CONFIG_SYS_DFU_DATA_BUF_SIZE (16 * 1024 * 1024)
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#define DFU_DEFAULT_POLL_TIMEOUT 300
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/* USB IDs */
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#define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525
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#define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5
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#endif
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#endif
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/* Watchdog */
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#define CONFIG_HW_WATCHDOG
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#define CONFIG_IMX_WATCHDOG
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#define CONFIG_WATCHDOG_TIMEOUT_MSECS 60000
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_LOADADDR 0x12000000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"console=ttymxc0,115200\0" \
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"fdt_addr=0x18000000\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"kernel_addr_r=0x10008000\0" \
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"fdt_addr_r=0x13000000\0" \
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"ramdisk_addr_r=0x18000000\0" \
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"scriptaddr=0x14000000\0" \
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"fdtfile=imx6q-dhcom-pdk2.dtb\0"\
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BOOTENV
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#define CONFIG_BOOTCOMMAND "run distro_bootcmd"
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 0) \
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func(MMC, mmc, 2) \
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func(USB, usb, 1) \
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func(SATA, sata, 0) \
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func(DHCP, dhcp, na)
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#include <config_distro_bootcmd.h>
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#endif
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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#define CONFIG_SYS_MEMTEST_START 0x10000000
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#define CONFIG_SYS_MEMTEST_END 0x20000000
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#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
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/* Environment */
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#define CONFIG_ENV_SIZE (16 * 1024)
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#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
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#if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
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#define CONFIG_ENV_OFFSET (1024 * 1024)
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#define CONFIG_ENV_SECT_SIZE (64 * 1024)
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#define CONFIG_ENV_OFFSET_REDUND \
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(CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
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#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
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#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
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#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
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#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
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#endif
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#endif /* __DH_IMX6_CONFIG_H */
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