mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-15 09:27:35 +00:00
eaf6ea6a1d
- Make all users of CUSTOM_SYS_INIT_SP_ADDR reference SYS_INIT_SP_ADDR - Introduce HAS_CUSTOM_SYS_INIT_SP_ADDR to allow for setting the stack pointer directly, otherwise we use the common calculation. - On some platforms that were using the standard calculation but did not set CONFIG_SYS_INIT_RAM_SIZE / CONFIG_SYS_INIT_RAM_ADDR, set them. - On a small number of platforms that were not subtracting GENERATED_GBL_DATA_SIZE do so now via the standard calculation. - CONFIG_SYS_INIT_SP_OFFSET is now widely unused, so remove it from most board config header files. Signed-off-by: Tom Rini <trini@konsulko.com>
72 lines
1 KiB
ArmAsm
72 lines
1 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.Iwamatsu.yj@renesas.com>
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* Copyright (C) 2012 Renesas Solutions Corp.
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*/
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#include <config.h>
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#include <linux/linkage.h>
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#include <system-constants.h>
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ENTRY(lowlevel_init)
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ldr r0, =MERAM_BASE
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mov r1, #0x0
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str r1, [r0]
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mrc p15, 0, r0, c0, c0, 5
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ands r0, r0, #0xF
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beq lowlevel_init__
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b wait_interrupt
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.pool
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.align 4
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wait_interrupt:
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#ifdef ICCICR
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ldr r1, =ICCICR
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mov r2, #0x0
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str r2, [r1]
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mov r2, #0xF0
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adds r1, r1, #4 /* ICCPMR */
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str r2, [r1]
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ldr r1, =ICCICR
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mov r2, #0x1
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str r2, [r1]
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#endif
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wait_loop:
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.long 0xE320F003 /* wfi */
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ldr r2, [r1, #0xC]
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str r2, [r1, #0x10]
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ldr r0, =MERAM_BASE
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ldr r2, [r0]
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cmp r2, #0
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movne pc, r2
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b wait_loop
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wait_loop_end:
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.pool
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.align 4
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lowlevel_init__:
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mov r0, #0x200000
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loop0:
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subs r0, r0, #1
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bne loop0
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ldr sp, MERAM_STACK
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b s_init
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.pool
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.align 4
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ENDPROC(lowlevel_init)
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.ltorg
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MERAM_STACK:
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.word LOW_LEVEL_MERAM_STACK
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