mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-17 02:08:38 +00:00
ef5d9eb925
This change is driven by need of general gpio_* functions, which as their parameter are accepting the GPIO pin number, NOT block and pin. This makes the code alike to omap, and allows for using more generic frameworks (e.g. software I2C). Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
136 lines
3.4 KiB
C
136 lines
3.4 KiB
C
/*
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* Copyright (C) 2011 Samsung Electronics
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <netdev.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/mmc.h>
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#include <asm/arch/sromc.h>
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DECLARE_GLOBAL_DATA_PTR;
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struct s5pc210_gpio_part1 *gpio1;
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struct s5pc210_gpio_part2 *gpio2;
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static void smc9115_pre_init(void)
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{
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u32 smc_bw_conf, smc_bc_conf;
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/* gpio configuration GPK0CON */
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s5p_gpio_cfg_pin(&gpio2->y0, CONFIG_ENV_SROM_BANK, GPIO_FUNC(2));
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/* Ethernet needs bus width of 16 bits */
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smc_bw_conf = SROMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK);
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smc_bc_conf = SROMC_BC_TACS(0x0F) | SROMC_BC_TCOS(0x0F)
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| SROMC_BC_TACC(0x0F) | SROMC_BC_TCOH(0x0F)
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| SROMC_BC_TAH(0x0F) | SROMC_BC_TACP(0x0F)
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| SROMC_BC_PMC(0x0F);
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/* Select and configure the SROMC bank */
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s5p_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf);
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}
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int board_init(void)
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{
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gpio1 = (struct s5pc210_gpio_part1 *) S5PC210_GPIO_PART1_BASE;
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gpio2 = (struct s5pc210_gpio_part2 *) S5PC210_GPIO_PART2_BASE;
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smc9115_pre_init();
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gd->bd->bi_arch_number = MACH_TYPE_SMDKV310;
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gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
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return 0;
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}
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int dram_init(void)
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{
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gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
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+ get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
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+ get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
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+ get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
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return 0;
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}
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void dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
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gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
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gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
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gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
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gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
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gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
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}
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC911X
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rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
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#endif
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return rc;
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}
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#ifdef CONFIG_DISPLAY_BOARDINFO
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int checkboard(void)
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{
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printf("\nBoard: SMDKV310\n");
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return 0;
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}
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#endif
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#ifdef CONFIG_GENERIC_MMC
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int board_mmc_init(bd_t *bis)
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{
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int i, err;
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/*
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* MMC2 SD card GPIO:
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*
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* GPK2[0] SD_2_CLK(2)
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* GPK2[1] SD_2_CMD(2)
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* GPK2[2] SD_2_CDn
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* GPK2[3:6] SD_2_DATA[0:3](2)
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*/
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for (i = 0; i < 7; i++) {
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/* GPK2[0:6] special function 2 */
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s5p_gpio_cfg_pin(&gpio2->k2, i, GPIO_FUNC(0x2));
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/* GPK2[0:6] drv 4x */
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s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X);
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/* GPK2[0:1] pull disable */
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if (i == 0 || i == 1) {
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gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE);
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continue;
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}
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/* GPK2[2:6] pull up */
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s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_UP);
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}
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err = s5p_mmc_init(2, 4);
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return err;
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}
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#endif
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