mirror of
https://github.com/AsahiLinux/u-boot
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289f932c5f
* Patch by Richard Woodruff, 10 Jan 2005: Update support for OMAP2420 (ARM11) and H4 board: o clean up and add new types to H4 memory probe code. o fix to work with internal boot. o added PRCM config III operation. o fix marginal flash timings. o add revison ATAG usage. o enable voltage scaling at power chip. o fix compile error for i2c. * Fix network problem (error when receiving multiple ARP packets)
318 lines
6.8 KiB
C
318 lines
6.8 KiB
C
/*
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* Basic I2C functions
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*
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* Copyright (c) 2004 Texas Instruments
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*
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* This package is free software; you can redistribute it and/or
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* modify it under the terms of the license found in the file
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* named COPYING that should have accompanied this file.
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*
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* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
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* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
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*
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* Author: Jian Zhang jzhang@ti.com, Texas Instruments
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*
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* Copyright (c) 2003 Wolfgang Denk, wd@denx.de
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* Rewritten to fit into the current U-Boot framework
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*
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* Adapted for OMAP2420 I2C, r-woodruff2@ti.com
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*
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*/
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#include <common.h>
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#ifdef CONFIG_DRIVER_OMAP24XX_I2C
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#include <asm/arch/i2c.h>
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#include <asm/io.h>
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#define inw(a) __raw_readw(a)
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#define outw(a,v) __raw_writew(a,v)
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static void wait_for_bb (void);
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static u16 wait_for_pin (void);
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void flush_fifo(void);
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void i2c_init (int speed, int slaveadd)
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{
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u16 scl;
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if (inw (I2C_CON) & I2C_CON_EN) {
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outw (0, I2C_CON);
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udelay (50000);
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}
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/* 12Mhz I2C module clock */
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outw (0, I2C_PSC);
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speed = speed/1000; /* 100 or 400 */
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scl = ((12000/(speed*2)) - 7); /* use 7 when PSC = 0 */
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outw (scl, I2C_SCLL);
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outw (scl, I2C_SCLH);
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/* own address */
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outw (slaveadd, I2C_OA);
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outw (I2C_CON_EN, I2C_CON);
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outw (0, I2C_CNT);
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/* have to enable intrrupts or OMAP i2c module doesn't work */
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outw (I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE |
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I2C_IE_NACK_IE | I2C_IE_AL_IE, I2C_IE);
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udelay (1000);
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}
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static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
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{
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int i2c_error = 0;
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u16 status;
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/* wait until bus not busy */
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wait_for_bb ();
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/* one byte only */
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outw (1, I2C_CNT);
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/* set slave address */
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outw (devaddr, I2C_SA);
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/* no stop bit needed here */
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outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX, I2C_CON);
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status = wait_for_pin ();
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if (status & I2C_STAT_XRDY) {
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/* Important: have to use byte access */
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*(volatile u8 *) (I2C_DATA) = regoffset;
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udelay (20000);
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if (inw (I2C_STAT) & I2C_STAT_NACK) {
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i2c_error = 1;
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}
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} else {
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i2c_error = 1;
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}
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if (!i2c_error) {
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/* free bus, otherwise we can't use a combined transction */
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outw (0, I2C_CON);
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while (inw (I2C_STAT) || (inw (I2C_CON) & I2C_CON_MST)) {
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udelay (10000);
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/* Have to clear pending interrupt to clear I2C_STAT */
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outw (0xFFFF, I2C_STAT);
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}
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wait_for_bb ();
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/* set slave address */
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outw (devaddr, I2C_SA);
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/* read one byte from slave */
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outw (1, I2C_CNT);
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/* need stop bit here */
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outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP,
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I2C_CON);
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status = wait_for_pin ();
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if (status & I2C_STAT_RRDY) {
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*value = inw (I2C_DATA);
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udelay (20000);
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} else {
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i2c_error = 1;
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}
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if (!i2c_error) {
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outw (I2C_CON_EN, I2C_CON);
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while (inw (I2C_STAT)
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|| (inw (I2C_CON) & I2C_CON_MST)) {
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udelay (10000);
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outw (0xFFFF, I2C_STAT);
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}
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}
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}
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flush_fifo();
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outw (0xFFFF, I2C_STAT);
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outw (0, I2C_CNT);
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return i2c_error;
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}
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static int i2c_write_byte (u8 devaddr, u8 regoffset, u8 value)
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{
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int i2c_error = 0;
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u16 status, stat;
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/* wait until bus not busy */
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wait_for_bb ();
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/* two bytes */
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outw (2, I2C_CNT);
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/* set slave address */
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outw (devaddr, I2C_SA);
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/* stop bit needed here */
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outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX |
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I2C_CON_STP, I2C_CON);
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/* wait until state change */
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status = wait_for_pin ();
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if (status & I2C_STAT_XRDY) {
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/* send out two bytes */
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outw ((value << 8) + regoffset, I2C_DATA);
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/* must have enough delay to allow BB bit to go low */
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udelay (50000);
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if (inw (I2C_STAT) & I2C_STAT_NACK) {
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i2c_error = 1;
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}
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} else {
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i2c_error = 1;
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}
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if (!i2c_error) {
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outw (I2C_CON_EN, I2C_CON);
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while ((stat = inw (I2C_STAT)) || (inw (I2C_CON) & I2C_CON_MST)) {
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udelay (1000);
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/* have to read to clear intrrupt */
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outw (0xFFFF, I2C_STAT);
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}
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}
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flush_fifo();
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outw (0xFFFF, I2C_STAT);
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outw (0, I2C_CNT);
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return i2c_error;
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}
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void flush_fifo(void)
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{ u16 stat;
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/* note: if you try and read data when its not there or ready
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* you get a bus error
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*/
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while(1){
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stat = inw(I2C_STAT);
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if(stat == I2C_STAT_RRDY){
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inw(I2C_DATA);
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outw(I2C_STAT_RRDY,I2C_STAT);
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udelay(1000);
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}else
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break;
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}
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}
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int i2c_probe (uchar chip)
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{
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int res = 1; /* default = fail */
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if (chip == inw (I2C_OA)) {
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return res;
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}
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/* wait until bus not busy */
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wait_for_bb ();
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/* try to read one byte */
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outw (1, I2C_CNT);
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/* set slave address */
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outw (chip, I2C_SA);
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/* stop bit needed here */
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outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, I2C_CON);
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/* enough delay for the NACK bit set */
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udelay (50000);
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if (!(inw (I2C_STAT) & I2C_STAT_NACK)) {
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res = 0; /* success case */
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flush_fifo();
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outw(0xFFFF, I2C_STAT);
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} else {
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outw(0xFFFF, I2C_STAT); /* failue, clear sources*/
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outw (inw (I2C_CON) | I2C_CON_STP, I2C_CON); /* finish up xfer */
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udelay(20000);
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wait_for_bb ();
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}
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flush_fifo();
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outw (0, I2C_CNT); /* don't allow any more data in...we don't want it.*/
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outw(0xFFFF, I2C_STAT);
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return res;
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}
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int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len)
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{
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int i;
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if (alen > 1) {
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printf ("I2C read: addr len %d not supported\n", alen);
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return 1;
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}
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if (addr + len > 256) {
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printf ("I2C read: address out of range\n");
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return 1;
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}
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for (i = 0; i < len; i++) {
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if (i2c_read_byte (chip, addr + i, &buffer[i])) {
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printf ("I2C read: I/O error\n");
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i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
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return 1;
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}
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}
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return 0;
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}
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int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len)
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{
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int i;
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if (alen > 1) {
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printf ("I2C read: addr len %d not supported\n", alen);
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return 1;
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}
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if (addr + len > 256) {
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printf ("I2C read: address out of range\n");
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return 1;
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}
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for (i = 0; i < len; i++) {
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if (i2c_write_byte (chip, addr + i, buffer[i])) {
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printf ("I2C read: I/O error\n");
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i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
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return 1;
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}
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}
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return 0;
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}
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static void wait_for_bb (void)
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{
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int timeout = 10;
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u16 stat;
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outw(0xFFFF, I2C_STAT); /* clear current interruts...*/
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while ((stat = inw (I2C_STAT) & I2C_STAT_BB) && timeout--) {
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outw (stat, I2C_STAT);
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udelay (50000);
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}
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if (timeout <= 0) {
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printf ("timed out in wait_for_bb: I2C_STAT=%x\n",
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inw (I2C_STAT));
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}
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outw(0xFFFF, I2C_STAT); /* clear delayed stuff*/
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}
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static u16 wait_for_pin (void)
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{
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u16 status;
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int timeout = 10;
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do {
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udelay (1000);
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status = inw (I2C_STAT);
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} while ( !(status &
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(I2C_STAT_ROVR | I2C_STAT_XUDF | I2C_STAT_XRDY |
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I2C_STAT_RRDY | I2C_STAT_ARDY | I2C_STAT_NACK |
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I2C_STAT_AL)) && timeout--);
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if (timeout <= 0) {
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printf ("timed out in wait_for_pin: I2C_STAT=%x\n",
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inw (I2C_STAT));
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outw(0xFFFF, I2C_STAT);
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}
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return status;
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}
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#endif /* CONFIG_DRIVER_OMAP24XX_I2C */
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