mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-14 08:57:58 +00:00
2509493cc1
TFTP transfer size can be used to re-size the TFTP progress bar on single line based on the server reported file size. The support for this has been around from 2019, but it was never converted to proper Kconfig. While adding this new Kconfig, enable it by default for OMAP2+ and K3 devices also. Signed-off-by: Tero Kristo <kristo@kernel.org>
108 lines
2.5 KiB
Text
108 lines
2.5 KiB
Text
CONFIG_ARM=y
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# CONFIG_ARM64_SUPPORT_AARCH32 is not set
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CONFIG_ARCH_OCTEONTX2=y
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CONFIG_SYS_TEXT_BASE=0x04000000
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CONFIG_SYS_MALLOC_F_LEN=0x4000
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SYS_MEMTEST_START=0x04000000
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CONFIG_SYS_MEMTEST_END=0x040f0000
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CONFIG_ENV_SIZE=0x8000
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CONFIG_ENV_OFFSET=0xF00000
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CONFIG_ENV_SECT_SIZE=0x10000
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CONFIG_TARGET_OCTEONTX2_95XX=y
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CONFIG_DM_GPIO=y
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CONFIG_DEBUG_UART_BASE=0x87e028000000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART=y
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CONFIG_FIT=y
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CONFIG_FIT_SIGNATURE=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_BOOTDELAY=5
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus=6 rootwait rw root=/dev/mmcblk0p2 coherent_pool=16M"
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_BOARD_EARLY_INIT_R=y
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CONFIG_HUSH_PARSER=y
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CONFIG_SYS_PROMPT="Marvell> "
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# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
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CONFIG_CMD_MD5SUM=y
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CONFIG_MD5SUM_VERIFY=y
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CONFIG_CMD_MX_CYCLIC=y
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CONFIG_CMD_MEMTEST=y
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CONFIG_CMD_SHA1SUM=y
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CONFIG_SHA1SUM_VERIFY=y
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CONFIG_CMD_DM=y
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_BKOPS_ENABLE=y
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CONFIG_CMD_PART=y
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CONFIG_CMD_PCI=y
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CONFIG_CMD_SF_TEST=y
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CONFIG_CMD_WDT=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_TFTPPUT=y
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CONFIG_CMD_TFTPSRV=y
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CONFIG_CMD_RARP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CDP=y
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CONFIG_CMD_SNTP=y
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CONFIG_CMD_DNS=y
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CONFIG_CMD_LINK_LOCAL=y
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CONFIG_CMD_PXE=y
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CONFIG_CMD_TIME=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_FS_GENERIC=y
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CONFIG_EFI_PARTITION=y
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CONFIG_PARTITION_TYPE_GUID=y
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CONFIG_OF_BOARD=y
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_USE_ENV_SPI_BUS=y
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CONFIG_ENV_SPI_BUS=0
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CONFIG_USE_ENV_SPI_CS=y
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CONFIG_ENV_SPI_CS=0
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CONFIG_USE_ENV_SPI_MAX_HZ=y
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CONFIG_ENV_SPI_MAX_HZ=125000000
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CONFIG_USE_ENV_SPI_MODE=y
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CONFIG_ENV_SPI_MODE=0x0
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CONFIG_VERSION_VARIABLE=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_TFTP_TSIZE=y
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CONFIG_DM_I2C=y
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CONFIG_MISC=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_MMC_OCTEONTX=y
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CONFIG_MTD=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_MODE=0x0
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CONFIG_SF_DEFAULT_SPEED=125000000
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CONFIG_SPI_FLASH_SFDP_SUPPORT=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_DM_ETH=y
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CONFIG_NET_OCTEONTX2=y
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CONFIG_OCTEONTX_SMI=y
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CONFIG_PCI=y
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CONFIG_DM_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCI_REGION_MULTI_ENTRY=y
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CONFIG_PCI_SRIOV=y
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CONFIG_PCI_ARID=y
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CONFIG_PCI_OCTEONTX=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_REGULATOR_GPIO=y
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CONFIG_DM_RTC=y
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CONFIG_DM_SERIAL=y
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CONFIG_DEBUG_UART_SKIP_INIT=y
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CONFIG_PL01X_SERIAL=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_WDT=y
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CONFIG_ERRNO_STR=y
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