mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 23:24:38 +00:00
056845c235
The linux/sizes.h, asm/arch/imx-regs.h, asm/imx-common/gpio.h, config_cmd_default.h includes are used fairly universally across imx6 boards so include them in mx6_common.h by default. We define CONFIG_SYS_NO_FLASH before config_cmd_default.h so that we don't have to undef CONFIG_CMD_FLASH / CONFIG_CMD_IMLS everywhere. Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
75 lines
1.9 KiB
C
75 lines
1.9 KiB
C
/*
|
|
* Copyright (C) 2012 Freescale Semiconductor, Inc.
|
|
*
|
|
* Configuration settings for the Freescale i.MX6Q SabreSD board.
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#ifndef __MX6QSABRESD_CONFIG_H
|
|
#define __MX6QSABRESD_CONFIG_H
|
|
|
|
#ifdef CONFIG_SPL
|
|
#define CONFIG_SPL_LIBCOMMON_SUPPORT
|
|
#define CONFIG_SPL_MMC_SUPPORT
|
|
#include "imx6_spl.h"
|
|
#endif
|
|
|
|
#define CONFIG_MACH_TYPE 3980
|
|
#define CONFIG_MXC_UART_BASE UART1_BASE
|
|
#define CONFIG_CONSOLE_DEV "ttymxc0"
|
|
#define CONFIG_MMCROOT "/dev/mmcblk1p2"
|
|
#if defined(CONFIG_MX6Q)
|
|
#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabresd.dtb"
|
|
#elif defined(CONFIG_MX6DL)
|
|
#define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabresd.dtb"
|
|
#endif
|
|
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
|
|
|
|
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
|
|
|
|
#include "mx6sabre_common.h"
|
|
|
|
#define CONFIG_SYS_FSL_USDHC_NUM 3
|
|
#if defined(CONFIG_ENV_IS_IN_MMC)
|
|
#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
|
|
#endif
|
|
|
|
#define CONFIG_CMD_PCI
|
|
#ifdef CONFIG_CMD_PCI
|
|
#define CONFIG_PCI
|
|
#define CONFIG_PCI_PNP
|
|
#define CONFIG_PCI_SCAN_SHOW
|
|
#define CONFIG_PCIE_IMX
|
|
#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
|
|
#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
|
|
#endif
|
|
|
|
/* I2C Configs */
|
|
#define CONFIG_CMD_I2C
|
|
#define CONFIG_SYS_I2C
|
|
#define CONFIG_SYS_I2C_MXC
|
|
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
|
|
#define CONFIG_SYS_I2C_SPEED 100000
|
|
|
|
/* PMIC */
|
|
#define CONFIG_POWER
|
|
#define CONFIG_POWER_I2C
|
|
#define CONFIG_POWER_PFUZE100
|
|
#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
|
|
|
|
/* USB Configs */
|
|
#define CONFIG_CMD_USB
|
|
#ifdef CONFIG_CMD_USB
|
|
#define CONFIG_USB_EHCI
|
|
#define CONFIG_USB_EHCI_MX6
|
|
#define CONFIG_USB_STORAGE
|
|
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
|
|
#define CONFIG_USB_HOST_ETHER
|
|
#define CONFIG_USB_ETHER_ASIX
|
|
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
|
|
#define CONFIG_MXC_USB_FLAGS 0
|
|
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */
|
|
#endif
|
|
|
|
#endif /* __MX6QSABRESD_CONFIG_H */
|