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According to the MicroBlaze reference manual (xilinx2021.2/ug984/page-37): """ If an exception is caused by an instruction in a delay slot (that is, ESR[DS]=1), the exception handler should return execution to the address stored in BTR instead of the normal exception return address stored in R17. """ Adjust the code to print the proper return address for delay slot exceptions. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-4-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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