mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-06 13:14:27 +00:00
3c41728d80
Current codes assume the OPTEE address is at the end of first DRAM bank. Adjust the process to allow OPTEE in the middle of first bank. When OPTEE memory is removed from first bank, it may split the first bank to two banks, adjust the MMU table for the split case, Since the default CONFIG_NR_DRAM_BANKS is 4, it is enough, just enlarge i.MX8MP evk to default to avoid issue. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com> Tested-by: Silvano di Ninno <silvano.dininno@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
85 lines
2.1 KiB
Text
85 lines
2.1 KiB
Text
CONFIG_ARM=y
|
|
CONFIG_ARCH_IMX8M=y
|
|
CONFIG_SYS_TEXT_BASE=0x40200000
|
|
CONFIG_SPL_GPIO_SUPPORT=y
|
|
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
|
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
|
CONFIG_SYS_MALLOC_F_LEN=0x8000
|
|
CONFIG_ENV_SIZE=0x1000
|
|
CONFIG_ENV_OFFSET=0x400000
|
|
CONFIG_SYS_I2C_MXC_I2C1=y
|
|
CONFIG_SYS_I2C_MXC_I2C2=y
|
|
CONFIG_SYS_I2C_MXC_I2C3=y
|
|
CONFIG_DM_GPIO=y
|
|
CONFIG_SPL_TEXT_BASE=0x920000
|
|
CONFIG_TARGET_IMX8MP_EVK=y
|
|
CONFIG_SPL_MMC_SUPPORT=y
|
|
CONFIG_SPL_SERIAL_SUPPORT=y
|
|
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
|
|
CONFIG_SPL=y
|
|
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
|
|
CONFIG_FIT=y
|
|
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
|
|
CONFIG_SPL_LOAD_FIT=y
|
|
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
|
|
CONFIG_OF_SYSTEM_SETUP=y
|
|
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mp-lpddr4.cfg"
|
|
CONFIG_DEFAULT_FDT_FILE="imx8mp-evk.dtb"
|
|
CONFIG_BOARD_LATE_INIT=y
|
|
CONFIG_BOARD_EARLY_INIT_F=y
|
|
CONFIG_SPL_BOARD_INIT=y
|
|
CONFIG_SPL_BOOTROM_SUPPORT=y
|
|
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
|
|
CONFIG_SPL_SEPARATE_BSS=y
|
|
CONFIG_SPL_I2C_SUPPORT=y
|
|
CONFIG_SPL_POWER_SUPPORT=y
|
|
CONFIG_SPL_WATCHDOG_SUPPORT=y
|
|
CONFIG_HUSH_PARSER=y
|
|
CONFIG_SYS_PROMPT="u-boot=> "
|
|
# CONFIG_CMD_EXPORTENV is not set
|
|
# CONFIG_CMD_IMPORTENV is not set
|
|
# CONFIG_CMD_CRC32 is not set
|
|
CONFIG_CMD_CLK=y
|
|
CONFIG_CMD_FUSE=y
|
|
CONFIG_CMD_GPIO=y
|
|
CONFIG_CMD_I2C=y
|
|
CONFIG_CMD_MMC=y
|
|
CONFIG_CMD_CACHE=y
|
|
CONFIG_CMD_REGULATOR=y
|
|
CONFIG_CMD_EXT2=y
|
|
CONFIG_CMD_EXT4=y
|
|
CONFIG_CMD_EXT4_WRITE=y
|
|
CONFIG_CMD_FAT=y
|
|
CONFIG_OF_CONTROL=y
|
|
CONFIG_SPL_OF_CONTROL=y
|
|
CONFIG_DEFAULT_DEVICE_TREE="imx8mp-evk"
|
|
CONFIG_ENV_IS_IN_MMC=y
|
|
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
|
CONFIG_SPL_DM=y
|
|
CONFIG_CLK_COMPOSITE_CCF=y
|
|
CONFIG_CLK_IMX8MP=y
|
|
CONFIG_MXC_GPIO=y
|
|
CONFIG_DM_PCA953X=y
|
|
CONFIG_DM_I2C=y
|
|
CONFIG_SYS_I2C_MXC=y
|
|
CONFIG_LED=y
|
|
CONFIG_LED_GPIO=y
|
|
CONFIG_DM_MMC=y
|
|
CONFIG_SUPPORT_EMMC_BOOT=y
|
|
CONFIG_MMC_IO_VOLTAGE=y
|
|
CONFIG_FSL_ESDHC_IMX=y
|
|
CONFIG_PHYLIB=y
|
|
CONFIG_DM_ETH=y
|
|
CONFIG_PINCTRL=y
|
|
CONFIG_SPL_PINCTRL=y
|
|
CONFIG_PINCTRL_IMX8M=y
|
|
CONFIG_DM_REGULATOR=y
|
|
CONFIG_DM_REGULATOR_FIXED=y
|
|
CONFIG_DM_REGULATOR_GPIO=y
|
|
CONFIG_MXC_UART=y
|
|
CONFIG_SYSRESET=y
|
|
CONFIG_SPL_SYSRESET=y
|
|
CONFIG_SYSRESET_PSCI=y
|
|
CONFIG_SYSRESET_WATCHDOG=y
|
|
CONFIG_IMX_WATCHDOG=y
|