York Sun 98ffa19053 powerpc/mpc85xx: Add CONFIG_DDR_CLK_FREQ for corenet platform ... New corenet platforms with chassis2 have separated DDR clock inputs. Use CONFIG_DDR_CLK_FREQ for DDR clock. This patch also cleans up the logic of detecting and displaying synchronous vs asynchronous mode. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>		2012-10-22 14:31:33 -05:00
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cpu	powerpc/mpc85xx: Add CONFIG_DDR_CLK_FREQ for corenet platform	2012-10-22 14:31:33 -05:00
include/asm	powerpc/mpc85xx: Rewrite spin table to comply with ePAPR v1.1	2012-10-22 14:31:32 -05:00
lib	powerpc/mpc85xx: software workaround for DDR erratum A-004468	2012-10-22 14:31:28 -05:00
config.mk	Handle most LDSCRIPT setting centrally	2011-04-30 00:59:47 +02:00