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https://github.com/AsahiLinux/u-boot
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f7ae49fc4f
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
349 lines
7.7 KiB
C
349 lines
7.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
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*
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* (C) Copyright 2012
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* Heiko Schocher, DENX Software Engineering, hs@denx.de.
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*
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* Multibus/multiadapter I2C core functions (wrappers)
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*/
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#include <common.h>
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#include <i2c.h>
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#include <linker_lists.h>
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struct i2c_adapter *i2c_get_adapter(int index)
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{
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struct i2c_adapter *i2c_adap_p = ll_entry_start(struct i2c_adapter,
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i2c);
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int max = ll_entry_count(struct i2c_adapter, i2c);
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int i;
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if (index >= max) {
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printf("Error, wrong i2c adapter %d max %d possible\n",
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index, max);
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return i2c_adap_p;
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}
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if (index == 0)
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return i2c_adap_p;
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for (i = 0; i < index; i++)
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i2c_adap_p++;
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return i2c_adap_p;
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}
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#if !defined(CONFIG_SYS_I2C_DIRECT_BUS)
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struct i2c_bus_hose i2c_bus[CONFIG_SYS_NUM_I2C_BUSES] =
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CONFIG_SYS_I2C_BUSES;
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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#ifndef CONFIG_SYS_I2C_DIRECT_BUS
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/*
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* i2c_mux_set()
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* -------------
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*
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* This turns on the given channel on I2C multiplexer chip connected to
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* a given I2C adapter directly or via other multiplexers. In the latter
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* case the entire multiplexer chain must be initialized first starting
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* with the one connected directly to the adapter. When disabling a chain
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* muxes must be programmed in reverse order, starting with the one
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* farthest from the adapter.
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*
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* mux_id is the multiplexer chip type from defined in i2c.h. So far only
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* NXP (Philips) PCA954x multiplexers are supported. Switches are NOT
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* supported (anybody uses them?)
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*/
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static int i2c_mux_set(struct i2c_adapter *adap, int mux_id, int chip,
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int channel)
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{
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uint8_t buf;
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int ret;
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/* channel < 0 - turn off the mux */
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if (channel < 0) {
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buf = 0;
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ret = adap->write(adap, chip, 0, 0, &buf, 1);
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if (ret)
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printf("%s: Could not turn off the mux.\n", __func__);
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return ret;
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}
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switch (mux_id) {
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case I2C_MUX_PCA9540_ID:
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case I2C_MUX_PCA9542_ID:
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if (channel > 1)
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return -1;
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buf = (uint8_t)((channel & 0x01) | (1 << 2));
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break;
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case I2C_MUX_PCA9544_ID:
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if (channel > 3)
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return -1;
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buf = (uint8_t)((channel & 0x03) | (1 << 2));
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break;
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case I2C_MUX_PCA9547_ID:
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if (channel > 7)
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return -1;
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buf = (uint8_t)((channel & 0x07) | (1 << 3));
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break;
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case I2C_MUX_PCA9548_ID:
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if (channel > 7)
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return -1;
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buf = (uint8_t)(0x01 << channel);
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break;
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default:
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printf("%s: wrong mux id: %d\n", __func__, mux_id);
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return -1;
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}
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ret = adap->write(adap, chip, 0, 0, &buf, 1);
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if (ret)
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printf("%s: could not set mux: id: %d chip: %x channel: %d\n",
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__func__, mux_id, chip, channel);
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return ret;
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}
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static int i2c_mux_set_all(void)
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{
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struct i2c_bus_hose *i2c_bus_tmp = &i2c_bus[I2C_BUS];
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int i;
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/* Connect requested bus if behind muxes */
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if (i2c_bus_tmp->next_hop[0].chip != 0) {
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/* Set all muxes along the path to that bus */
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for (i = 0; i < CONFIG_SYS_I2C_MAX_HOPS; i++) {
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int ret;
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if (i2c_bus_tmp->next_hop[i].chip == 0)
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break;
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ret = i2c_mux_set(I2C_ADAP,
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i2c_bus_tmp->next_hop[i].mux.id,
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i2c_bus_tmp->next_hop[i].chip,
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i2c_bus_tmp->next_hop[i].channel);
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if (ret != 0)
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return ret;
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}
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}
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return 0;
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}
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static int i2c_mux_disconnect_all(void)
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{
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struct i2c_bus_hose *i2c_bus_tmp = &i2c_bus[I2C_BUS];
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int i;
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uint8_t buf = 0;
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if (I2C_ADAP->init_done == 0)
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return 0;
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/* Disconnect current bus (turn off muxes if any) */
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if ((i2c_bus_tmp->next_hop[0].chip != 0) &&
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(I2C_ADAP->init_done != 0)) {
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i = CONFIG_SYS_I2C_MAX_HOPS;
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do {
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uint8_t chip;
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int ret;
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chip = i2c_bus_tmp->next_hop[--i].chip;
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if (chip == 0)
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continue;
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ret = I2C_ADAP->write(I2C_ADAP, chip, 0, 0, &buf, 1);
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if (ret != 0) {
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printf("i2c: mux disconnect error\n");
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return ret;
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}
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} while (i > 0);
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}
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return 0;
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}
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#endif
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/*
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* i2c_init_bus():
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* ---------------
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*
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* Initializes one bus. Will initialize the parent adapter. No current bus
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* changes, no mux (if any) setup.
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*/
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static void i2c_init_bus(unsigned int bus_no, int speed, int slaveaddr)
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{
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if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES)
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return;
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I2C_ADAP->init(I2C_ADAP, speed, slaveaddr);
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if (gd->flags & GD_FLG_RELOC) {
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I2C_ADAP->init_done = 1;
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I2C_ADAP->speed = speed;
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I2C_ADAP->slaveaddr = slaveaddr;
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}
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}
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/* implement possible board specific board init */
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__weak void i2c_init_board(void)
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{
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}
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/* implement possible for i2c specific early i2c init */
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__weak void i2c_early_init_f(void)
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{
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}
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/*
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* i2c_init_all():
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*
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* not longer needed, will deleted. Actual init the SPD_BUS
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* for compatibility.
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* i2c_adap[] must be initialized beforehead with function pointers and
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* data, including speed and slaveaddr.
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*/
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void i2c_init_all(void)
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{
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i2c_init_board();
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i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM);
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return;
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}
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/*
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* i2c_get_bus_num():
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* ------------------
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*
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* Returns index of currently active I2C bus. Zero-based.
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*/
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unsigned int i2c_get_bus_num(void)
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{
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return gd->cur_i2c_bus;
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}
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/*
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* i2c_set_bus_num():
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* ------------------
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*
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* Change the active I2C bus. Subsequent read/write calls will
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* go to this one. Sets all of the muxes in a proper condition
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* if that bus is behind muxes.
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* If previously selected bus is behind the muxes turns off all the
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* muxes along the path to that bus.
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*
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* bus - bus index, zero based
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*
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* Returns: 0 on success, not 0 on failure
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*/
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int i2c_set_bus_num(unsigned int bus)
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{
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int max;
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if ((bus == I2C_BUS) && (I2C_ADAP->init_done > 0))
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return 0;
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#ifndef CONFIG_SYS_I2C_DIRECT_BUS
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if (bus >= CONFIG_SYS_NUM_I2C_BUSES)
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return -1;
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#endif
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max = ll_entry_count(struct i2c_adapter, i2c);
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if (I2C_ADAPTER(bus) >= max) {
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printf("Error, wrong i2c adapter %d max %d possible\n",
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I2C_ADAPTER(bus), max);
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return -2;
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}
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#ifndef CONFIG_SYS_I2C_DIRECT_BUS
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i2c_mux_disconnect_all();
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#endif
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gd->cur_i2c_bus = bus;
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if (I2C_ADAP->init_done == 0)
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i2c_init_bus(bus, I2C_ADAP->speed, I2C_ADAP->slaveaddr);
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#ifndef CONFIG_SYS_I2C_DIRECT_BUS
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i2c_mux_set_all();
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#endif
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return 0;
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}
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/*
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* Probe the given I2C chip address. Returns 0 if a chip responded,
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* not 0 on failure.
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*/
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int i2c_probe(uint8_t chip)
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{
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return I2C_ADAP->probe(I2C_ADAP, chip);
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}
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/*
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* Read/Write interface:
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* chip: I2C chip address, range 0..127
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* addr: Memory (register) address within the chip
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* alen: Number of bytes to use for addr (typically 1, 2 for larger
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* memories, 0 for register type devices with only one
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* register)
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* buffer: Where to read/write the data
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* len: How many bytes to read/write
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*
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* Returns: 0 on success, not 0 on failure
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*/
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int i2c_read(uint8_t chip, unsigned int addr, int alen,
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uint8_t *buffer, int len)
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{
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return I2C_ADAP->read(I2C_ADAP, chip, addr, alen, buffer, len);
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}
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int i2c_write(uint8_t chip, unsigned int addr, int alen,
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uint8_t *buffer, int len)
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{
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return I2C_ADAP->write(I2C_ADAP, chip, addr, alen, buffer, len);
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}
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unsigned int i2c_set_bus_speed(unsigned int speed)
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{
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unsigned int ret;
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if (I2C_ADAP->set_bus_speed == NULL)
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return 0;
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ret = I2C_ADAP->set_bus_speed(I2C_ADAP, speed);
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if (gd->flags & GD_FLG_RELOC)
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I2C_ADAP->speed = (ret == 0) ? speed : 0;
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return ret;
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}
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unsigned int i2c_get_bus_speed(void)
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{
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struct i2c_adapter *cur = I2C_ADAP;
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return cur->speed;
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}
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uint8_t i2c_reg_read(uint8_t addr, uint8_t reg)
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{
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uint8_t buf;
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i2c_read(addr, reg, 1, &buf, 1);
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#ifdef DEBUG
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printf("%s: bus=%d addr=0x%02x, reg=0x%02x, val=0x%02x\n",
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__func__, i2c_get_bus_num(), addr, reg, buf);
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#endif
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return buf;
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}
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void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val)
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{
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#ifdef DEBUG
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printf("%s: bus=%d addr=0x%02x, reg=0x%02x, val=0x%02x\n",
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__func__, i2c_get_bus_num(), addr, reg, val);
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#endif
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i2c_write(addr, reg, 1, &val, 1);
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}
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__weak void i2c_init(int speed, int slaveaddr)
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{
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i2c_init_bus(i2c_get_bus_num(), speed, slaveaddr);
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}
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