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21497ded5d
As the spi flash transfer to multiple parts, it is forgot to add Atmel AT25DF321 spi flash support, which broken several Atmel EK boards which this chip. So, add it Signed-off-by: Bo Shen <voice.shen@atmel.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
365 lines
12 KiB
C
365 lines
12 KiB
C
/*
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* SPI flash probing
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*
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* Copyright (C) 2008 Atmel Corporation
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* Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
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* Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <fdtdec.h>
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#include <malloc.h>
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#include <spi.h>
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#include <spi_flash.h>
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#include "sf_internal.h"
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DECLARE_GLOBAL_DATA_PTR;
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/**
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* struct spi_flash_params - SPI/QSPI flash device params structure
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*
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* @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
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* @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
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* @ext_jedec: Device ext_jedec ID
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* @sector_size: Sector size of this device
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* @nr_sectors: No.of sectors on this device
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* @flags: Importent param, for flash specific behaviour
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*/
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struct spi_flash_params {
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const char *name;
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u32 jedec;
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u16 ext_jedec;
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u32 sector_size;
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u32 nr_sectors;
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u16 flags;
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};
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static const struct spi_flash_params spi_flash_params_table[] = {
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#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
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{"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, SECT_4K},
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{"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, SECT_4K},
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{"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, SECT_4K},
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{"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, SECT_4K},
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{"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, SECT_4K},
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{"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, SECT_4K},
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{"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, SECT_4K},
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{"AT25DF321", 0x1f4701, 0x0, 64 * 1024, 64, SECT_4K},
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#endif
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#ifdef CONFIG_SPI_FLASH_EON /* EON */
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{"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0},
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{"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, SECT_4K},
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{"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0},
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{"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, 0},
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#endif
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#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
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{"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, SECT_4K},
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{"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, SECT_4K},
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#endif
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#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
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{"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0},
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{"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0},
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{"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0},
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{"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0},
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{"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0},
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{"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, 0},
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{"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512, 0},
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{"MX25L51235F", 0xc2201A, 0x0, 64 * 1024, 1024, 0},
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{"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, 0},
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#endif
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#ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
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{"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0},
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{"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0},
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{"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0},
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{"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0},
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{"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, 0},
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{"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, 0},
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{"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, 0},
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{"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, 0},
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{"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, 0},
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{"S25FL256S_256K", 0x010219, 0x4d00, 64 * 1024, 512, 0},
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{"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, 0},
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{"S25FL512S_256K", 0x010220, 0x4d00, 64 * 1024, 1024, 0},
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{"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, 0},
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#endif
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#ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
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{"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0},
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{"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0},
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{"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0},
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{"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0},
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{"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0},
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{"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0},
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{"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0},
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{"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0},
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{"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, SECT_4K},
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{"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, SECT_4K},
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{"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, SECT_4K},
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{"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, SECT_4K},
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{"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, SECT_4K},
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{"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, SECT_4K},
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{"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, SECT_4K},
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{"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, SECT_4K},
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{"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, E_FSR | SECT_4K},
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{"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, E_FSR | SECT_4K},
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{"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, E_FSR | SECT_4K},
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{"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, E_FSR | SECT_4K},
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#endif
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#ifdef CONFIG_SPI_FLASH_SST /* SST */
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{"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WP},
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{"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WP},
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{"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WP},
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{"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WP},
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{"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, SECT_4K},
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{"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WP},
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{"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WP},
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{"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WP},
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{"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WP},
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{"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WP},
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#endif
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#ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */
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{"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0},
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{"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0},
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{"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0},
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{"W25X40", 0xef3013, 0x0, 64 * 1024, 8, SECT_4K},
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{"W25X16", 0xef3015, 0x0, 64 * 1024, 32, SECT_4K},
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{"W25X32", 0xef3016, 0x0, 64 * 1024, 64, SECT_4K},
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{"W25X64", 0xef3017, 0x0, 64 * 1024, 128, SECT_4K},
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{"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, SECT_4K},
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{"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, SECT_4K},
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{"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, SECT_4K},
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{"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, SECT_4K},
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{"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, SECT_4K},
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{"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, SECT_4K},
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{"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, SECT_4K},
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{"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, SECT_4K},
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{"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, SECT_4K},
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{"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, SECT_4K},
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{"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, SECT_4K},
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#endif
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/*
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* Note:
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* Below paired flash devices has similar spi_flash params.
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* (S25FL129P_64K, S25FL128S_64K)
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* (W25Q80BL, W25Q80BV)
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* (W25Q16CL, W25Q16DV)
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* (W25Q32BV, W25Q32FV_SPI)
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* (W25Q64CV, W25Q64FV_SPI)
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* (W25Q128BV, W25Q128FV_SPI)
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* (W25Q32DW, W25Q32FV_QPI)
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* (W25Q64DW, W25Q64FV_QPI)
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* (W25Q128FW, W25Q128FV_QPI)
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*/
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};
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static struct spi_flash *spi_flash_validate_params(struct spi_slave *spi,
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u8 *idcode)
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{
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const struct spi_flash_params *params;
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struct spi_flash *flash;
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int i;
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u16 jedec = idcode[1] << 8 | idcode[2];
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u16 ext_jedec = idcode[3] << 8 | idcode[4];
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/* Get the flash id (jedec = manuf_id + dev_id, ext_jedec) */
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for (i = 0; i < ARRAY_SIZE(spi_flash_params_table); i++) {
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params = &spi_flash_params_table[i];
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if ((params->jedec >> 16) == idcode[0]) {
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if ((params->jedec & 0xFFFF) == jedec) {
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if (params->ext_jedec == 0)
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break;
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else if (params->ext_jedec == ext_jedec)
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break;
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}
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}
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}
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if (i == ARRAY_SIZE(spi_flash_params_table)) {
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printf("SF: Unsupported flash IDs: ");
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printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
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idcode[0], jedec, ext_jedec);
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return NULL;
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}
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flash = malloc(sizeof(*flash));
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if (!flash) {
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debug("SF: Failed to allocate spi_flash\n");
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return NULL;
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}
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memset(flash, '\0', sizeof(*flash));
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/* Assign spi data */
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flash->spi = spi;
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flash->name = params->name;
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flash->memory_map = spi->memory_map;
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/* Assign spi_flash ops */
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flash->write = spi_flash_cmd_write_ops;
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#ifdef CONFIG_SPI_FLASH_SST
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if (params->flags & SST_WP)
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flash->write = sst_write_wp;
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#endif
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flash->erase = spi_flash_cmd_erase_ops;
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flash->read = spi_flash_cmd_read_ops;
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/* Compute the flash size */
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flash->page_size = (ext_jedec == 0x4d00) ? 512 : 256;
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flash->sector_size = params->sector_size;
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flash->size = flash->sector_size * params->nr_sectors;
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/* Compute erase sector and command */
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if (params->flags & SECT_4K) {
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flash->erase_cmd = CMD_ERASE_4K;
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flash->erase_size = 4096;
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} else if (params->flags & SECT_32K) {
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flash->erase_cmd = CMD_ERASE_32K;
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flash->erase_size = 32768;
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} else {
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flash->erase_cmd = CMD_ERASE_64K;
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flash->erase_size = flash->sector_size;
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}
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/* Poll cmd seclection */
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flash->poll_cmd = CMD_READ_STATUS;
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#ifdef CONFIG_SPI_FLASH_STMICRO
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if (params->flags & E_FSR)
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flash->poll_cmd = CMD_FLAG_STATUS;
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#endif
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/* Configure the BAR - discover bank cmds and read current bank */
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#ifdef CONFIG_SPI_FLASH_BAR
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u8 curr_bank = 0;
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if (flash->size > SPI_FLASH_16MB_BOUN) {
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flash->bank_read_cmd = (idcode[0] == 0x01) ?
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CMD_BANKADDR_BRRD : CMD_EXTNADDR_RDEAR;
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flash->bank_write_cmd = (idcode[0] == 0x01) ?
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CMD_BANKADDR_BRWR : CMD_EXTNADDR_WREAR;
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if (spi_flash_read_common(flash, &flash->bank_read_cmd, 1,
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&curr_bank, 1)) {
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debug("SF: fail to read bank addr register\n");
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return NULL;
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}
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flash->bank_curr = curr_bank;
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} else {
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flash->bank_curr = curr_bank;
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}
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#endif
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/* Flash powers up read-only, so clear BP# bits */
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#if defined(CONFIG_SPI_FLASH_ATMEL) || \
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defined(CONFIG_SPI_FLASH_MACRONIX) || \
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defined(CONFIG_SPI_FLASH_SST)
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spi_flash_cmd_write_status(flash, 0);
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#endif
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return flash;
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}
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#ifdef CONFIG_OF_CONTROL
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int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
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{
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fdt_addr_t addr;
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fdt_size_t size;
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int node;
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/* If there is no node, do nothing */
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node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
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if (node < 0)
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return 0;
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addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
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if (addr == FDT_ADDR_T_NONE) {
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debug("%s: Cannot decode address\n", __func__);
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return 0;
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}
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if (flash->size != size) {
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debug("%s: Memory map must cover entire device\n", __func__);
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return -1;
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}
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flash->memory_map = (void *)addr;
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return 0;
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}
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#endif /* CONFIG_OF_CONTROL */
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struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
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unsigned int max_hz, unsigned int spi_mode)
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{
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struct spi_slave *spi;
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struct spi_flash *flash = NULL;
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u8 idcode[5];
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int ret;
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/* Setup spi_slave */
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spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
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if (!spi) {
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printf("SF: Failed to set up slave\n");
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return NULL;
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}
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/* Claim spi bus */
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ret = spi_claim_bus(spi);
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if (ret) {
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debug("SF: Failed to claim SPI bus: %d\n", ret);
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goto err_claim_bus;
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}
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/* Read the ID codes */
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ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
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if (ret) {
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printf("SF: Failed to get idcodes\n");
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goto err_read_id;
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}
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#ifdef DEBUG
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printf("SF: Got idcodes\n");
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print_buffer(0, idcode, 1, sizeof(idcode), 0);
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#endif
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/* Validate params from spi_flash_params table */
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flash = spi_flash_validate_params(spi, idcode);
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if (!flash)
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goto err_read_id;
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#ifdef CONFIG_OF_CONTROL
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if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
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debug("SF: FDT decode error\n");
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goto err_read_id;
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}
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#endif
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#ifndef CONFIG_SPL_BUILD
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printf("SF: Detected %s with page size ", flash->name);
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print_size(flash->page_size, ", erase size ");
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print_size(flash->erase_size, ", total ");
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print_size(flash->size, "");
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if (flash->memory_map)
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printf(", mapped at %p", flash->memory_map);
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puts("\n");
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#endif
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#ifndef CONFIG_SPI_FLASH_BAR
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if (flash->size > SPI_FLASH_16MB_BOUN) {
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puts("SF: Warning - Only lower 16MiB accessible,");
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puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");
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}
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#endif
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/* Release spi bus */
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spi_release_bus(spi);
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return flash;
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err_read_id:
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spi_release_bus(spi);
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err_claim_bus:
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spi_free_slave(spi);
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return NULL;
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}
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void spi_flash_free(struct spi_flash *flash)
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{
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spi_free_slave(flash->spi);
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free(flash);
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}
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