Sean Anderson f760c9a1fd riscv: Use a valid bit to ignore already-pending IPIs ... Some IPIs may already be pending when U-Boot is started. This could be a problem if a secondary hart tries to handle an IPI before the boot hart has initialized the IPI device. To be specific, the Kendryte K210 ROM-based bootloader does not clear IPIs before passing control to U-Boot. Without this patch, the secondary hart jumps to address 0x0 as soon as it enters secondary_hart_loop, and then hangs in its trap handler. This commit introduces a valid bit so secondary harts know when and IPI originates from U-Boot, and it is safe to use the IPI API. The valid bit is initialized to 0 by board_init_f_init_reserve. Before this, secondary harts wait in wait_for_gd_init. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Leo Liang <ycliang@andestech.com>		2020-09-30 08:54:52 +08:00
..
arch-fu540	riscv: sifive/fu540: spl: Rename soc_spl_init()	2020-08-14 14:38:53 +08:00
arch-generic	gpio: sifive: add support for DM based gpio driver for FU540-SoC	2019-10-18 09:04:01 +08:00
asm.h	riscv: Sync csr.h with Linux kernel v5.2	2019-08-15 13:42:28 +08:00
barrier.h	riscv: make use of the barrier functions from Linux	2018-11-26 13:57:30 +08:00
bitops.h	riscv: Define PLATFORM__CLEAR_BIT for generic_clear_bit()	2018-05-15 21:44:05 -04:00
byteorder.h	riscv: nx25: include: Add header files to support RISC-V	2018-01-12 08:05:12 -05:00
cache.h	riscv: cache: Implement i/dcache [status, enable, disable]	2018-11-26 13:58:01 +08:00
config.h	riscv: Enable CONFIG_SYS_BOOT_RAMDISK_HIGH for using initrd	2019-02-27 09:12:34 +08:00
csr.h	riscv: Add option to support RISC-V privileged spec 1.9	2020-07-01 15:01:22 +08:00
dma-mapping.h	dma-mapping: move dma_map_(un)single() to <linux/dma-mapping.h>	2020-02-19 21:27:30 +08:00
encoding.h	common: Drop linux/bitops.h from common header	2020-05-18 21:19:23 -04:00
global_data.h	riscv: Rework Andes PLMT as a UCLASS_TIMER driver	2020-09-30 08:54:45 +08:00
gpio.h	gpio: sifive: add support for DM based gpio driver for FU540-SoC	2019-10-18 09:04:01 +08:00
io.h	riscv: do not reimplement generic io functions	2018-11-26 13:57:30 +08:00
linkage.h	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
posix_types.h	riscv: fix use of incorrectly sized variables	2018-11-26 13:57:29 +08:00
processor.h	riscv: nx25: include: Add header files to support RISC-V	2018-01-12 08:05:12 -05:00
ptrace.h	riscv: checkpatch: Fix alignment should match open parenthesis	2018-03-30 13:13:22 +08:00
sbi.h	cmd: provide command sbi	2020-08-25 09:34:47 +08:00
sections.h	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
setjmp.h	SPDX: Convert single license tags to Linux Kernel style	2018-05-29 14:44:21 +08:00
smp.h	riscv: Use a valid bit to ignore already-pending IPIs	2020-09-30 08:54:52 +08:00
spl.h	riscv: Call spl_board_init_f() in the generic SPL board_init_f()	2020-08-14 14:38:53 +08:00
string.h	riscv: checkpatch: Fix Macro argument reuse	2018-03-30 13:13:22 +08:00
syscon.h	riscv: Rework Andes PLMT as a UCLASS_TIMER driver	2020-09-30 08:54:45 +08:00
system.h	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
types.h	riscv: fix use of incorrectly sized variables	2018-11-26 13:57:29 +08:00
u-boot-riscv.h	riscv: Provide a mechanism to fix DT for reserved memory	2020-04-23 10:14:16 +08:00
u-boot.h	bdinfo: riscv: Use generic bd_info	2020-06-25 13:24:10 -04:00
unaligned.h	riscv: nx25: include: Add header files to support RISC-V	2018-01-12 08:05:12 -05:00