Pragnesh Patel 7257455e7c riscv: fu540: dts: Correct reg size of clint node ... Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com>		2020-10-26 10:01:37 +08:00
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ae350_32.dts	riscv: dts: Add #address-cells and #size-cells in nor node	2019-12-10 08:23:10 +08:00
ae350_64.dts	riscv: dts: Add #address-cells and #size-cells in nor node	2019-12-10 08:23:10 +08:00
fu540-c000-u-boot.dtsi	riscv: fu540: dts: Correct reg size of clint node	2020-10-26 10:01:37 +08:00
fu540-c000.dtsi	riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux	2020-06-04 09:44:09 +08:00
fu540-hifive-unleashed-a00-ddr.dtsi	sifive: dts: fu540: Add DDR controller and phy register settings	2020-06-04 09:44:08 +08:00
hifive-unleashed-a00-u-boot.dtsi	riscv: Update SiFive device tree for new CLINT driver	2020-09-30 08:54:46 +08:00
hifive-unleashed-a00.dts	riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux	2020-06-04 09:44:09 +08:00
k210-maix-bit.dts	riscv: add DT binding for BOOT button on Maix board	2020-10-08 11:42:36 -04:00
k210.dtsi	riscv: k210: Reduce DMA block size	2020-10-26 09:27:24 +08:00
Makefile	riscv: Add device tree for K210 and Sipeed Maix BitM	2020-07-01 15:01:22 +08:00