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6caa185abd
To acheive this, the qrio_uprstreq() function that sets the UPRSTREQN flag in the qrio RESCNF reg is added. Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Reviewed-by: York Sun <yorksun@freescale.com>
35 lines
972 B
C
35 lines
972 B
C
/*
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* (C) Copyright 2013 Keymile AG
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* Valentin Longchamp <valentin.longchamp@keymile.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/* QRIO GPIO ports */
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#define GPIO_A 0x40
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#define GPIO_B 0x60
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int qrio_get_gpio(u8 port_off, u8 gpio_nr);
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void qrio_set_opendrain_gpio(u8 port_off, u8 gpio_nr, u8 val);
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void qrio_set_gpio(u8 port_off, u8 gpio_nr, bool value);
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void qrio_gpio_direction_output(u8 port_off, u8 gpio_nr, bool value);
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void qrio_gpio_direction_input(u8 port_off, u8 gpio_nr);
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#define PRSTCFG_POWUP_UNIT_CORE_RST 0x0
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#define PRSTCFG_POWUP_UNIT_RST 0x1
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#define PRSTCFG_POWUP_RST 0x3
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void qrio_prst(u8 bit, bool en, bool wden);
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void qrio_wdmask(u8 bit, bool wden);
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void qrio_prstcfg(u8 bit, u8 mode);
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void qrio_set_leds(void);
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void qrio_enable_app_buffer(void);
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void qrio_cpuwd_flag(bool flag);
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int qrio_reset_reason(void);
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#define UPREQ_UNIT_RST 0x0
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#define UPREQ_CORE_RST 0x1
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void qrio_uprstreq(u8 mode);
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void pci_of_setup(void *blob, bd_t *bd);
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