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u-boot/board/terasic/de0-nano-soc
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Chin Liang See 13022d852d arm: socfpga: de0-nano-soc: Adding handoff for SDRAM ctrlcfg.extratime1 
Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-27 08:03:11 +02:00
..
qts arm: socfpga: de0-nano-soc: Adding handoff for SDRAM ctrlcfg.extratime1 2016-10-27 08:03:11 +02:00
MAINTAINERS arm: socfpga: Add support for the Terasic DE-0 Atlas board 2015-09-04 11:54:21 +02:00
Makefile arm: socfpga: Add support for the Terasic DE-0 Atlas board 2015-09-04 11:54:21 +02:00
socfpga.c arm: socfpga: Drop the board boilerplate 2015-12-20 03:36:51 +01:00