mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-16 17:58:23 +00:00
ff3e077bd2
Add a uclass for PCI controllers and a generic one for PCI devices. Adjust the 'pci' command and the existing PCI support to work with this new uclass. Keep most of the compatibility code in a separate file so that it can be removed one day. TODO: Add more header file comments to the new parts of pci.h Signed-off-by: Simon Glass <sjg@chromium.org>
43 lines
1 KiB
C
43 lines
1 KiB
C
/*
|
|
* Compatibility functions for pre-driver-model code
|
|
*
|
|
* Copyright (C) 2014 Google, Inc
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
#define DEBUG
|
|
#include <common.h>
|
|
#include <dm.h>
|
|
#include <errno.h>
|
|
#include <malloc.h>
|
|
#include <pci.h>
|
|
#include <dm/device-internal.h>
|
|
#include <dm/lists.h>
|
|
|
|
#define PCI_HOSE_OP(rw, name, size, type) \
|
|
int pci_hose_##rw##_config_##name(struct pci_controller *hose, \
|
|
pci_dev_t dev, \
|
|
int offset, type value) \
|
|
{ \
|
|
return pci_##rw##_config##size(dev, offset, value); \
|
|
}
|
|
|
|
PCI_HOSE_OP(read, byte, 8, u8 *)
|
|
PCI_HOSE_OP(read, word, 16, u16 *)
|
|
PCI_HOSE_OP(read, dword, 32, u32 *)
|
|
PCI_HOSE_OP(write, byte, 8, u8)
|
|
PCI_HOSE_OP(write, word, 16, u16)
|
|
PCI_HOSE_OP(write, dword, 32, u32)
|
|
|
|
pci_dev_t pci_find_devices(struct pci_device_id *ids, int index)
|
|
{
|
|
struct pci_child_platdata *pplat;
|
|
struct udevice *bus, *dev;
|
|
|
|
if (pci_find_device_id(ids, index, &dev))
|
|
return -1;
|
|
bus = dev->parent;
|
|
pplat = dev_get_parent_platdata(dev);
|
|
|
|
return PCI_ADD_BUS(bus->seq, pplat->devfn);
|
|
}
|