u-boot/configs/stm32mp13_defconfig
Patrick Delaunay 2df7fc0824 configs: stm32mp1: reduce DDR_CACHEABLE_SIZE to supported 256MB DDR
Reduces the CONFIG_DDR_CACHEABLE_SIZE, the size of DDR mapped cacheable
before relocation, to support DDR with only 256MB because the OP-TEE
reserved memory is located at end of the DDR.

By default the new size of 128MB cacheable memory is enough
in dram_bank_mmu_setup() for early_enable_caches() in arch_cpu_init()
and is correct for DDR size = 256MB.

After relocation the real size of DDR, excluding the no-map reserved
memory, is used after the U-Boot device tree parsing.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:16:31 +02:00

78 lines
1.8 KiB
Text

CONFIG_ARM=y
CONFIG_ARCH_STM32MP=y
CONFIG_TFABOOT=y
CONFIG_SYS_MALLOC_F_LEN=0x180000
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0400000
CONFIG_ENV_OFFSET=0x900000
CONFIG_DEFAULT_DEVICE_TREE="stm32mp135f-dk"
CONFIG_SYS_PROMPT="STM32MP> "
CONFIG_STM32MP13x=y
CONFIG_DDR_CACHEABLE_SIZE=0x8000000
CONFIG_CMD_STM32KEY=y
CONFIG_TARGET_ST_STM32MP13x=y
CONFIG_ENV_OFFSET_REDUND=0x940000
# CONFIG_ARMV7_NONSEC is not set
CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_SYS_MEMTEST_START=0xc0000000
CONFIG_SYS_MEMTEST_END=0xc4000000
CONFIG_FIT=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=1
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_ADTIMG=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
CONFIG_CMD_CLK=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_LSBLK=y
CONFIG_CMD_MMC=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_TIME=y
CONFIG_CMD_RNG=y
CONFIG_CMD_TIMER=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_LOG=y
CONFIG_CMD_UBI=y
CONFIG_OF_LIVE=y
CONFIG_ENV_IS_NOWHERE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=-1
CONFIG_ENV_MMC_USE_DT=y
CONFIG_CLK_SCMI=y
CONFIG_GPIO_HOG=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_STM32F7=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_STM32_SDMMC2=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_PINCONF=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_REGULATOR_SCMI=y
CONFIG_RESET_SCMI=y
CONFIG_DM_RNG=y
CONFIG_DM_RTC=y
CONFIG_RTC_STM32=y
CONFIG_SERIAL_RX_BUFFER=y
CONFIG_SYSRESET_PSCI=y
CONFIG_TEE=y
CONFIG_OPTEE=y
# CONFIG_OPTEE_TA_AVB is not set
CONFIG_ERRNO_STR=y
# CONFIG_LMB_USE_MAX_REGIONS is not set
CONFIG_LMB_MEMORY_REGIONS=2
CONFIG_LMB_RESERVED_REGIONS=16