mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-09-22 07:32:03 +00:00
1b4c3e6125
For SOM with the EC configuration, the ethernet PHY is located on the SOM itself, and connected to the CPU ethernet controller. It has a reset line controlled via GPIO1_IO9. In this configuration, the PHY located on the carrier board is not connected to anything and is therefore not used. For SOM without EC configuration, the ethernet PHY on the carrier board is connected to the CPU ethernet controller. It has a reset line controlled via the GPIO expander PCA9534_IO5. The hardware configuration (EC) is determined at runtime by reading from the SOM EEPROM. To support both hardware configurations (EC and non-EC), adjust/fix the PHY reset gpios according to the hardware configuration read at runtime from the SOM EEPROM. This adjustement is done in U-Boot (OF_BOARD_FIXUP) and kernel (OF_BOARD_SETUP) device trees. Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
116 lines
2.9 KiB
Text
116 lines
2.9 KiB
Text
CONFIG_ARM=y
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CONFIG_ARCH_IMX8M=y
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CONFIG_TEXT_BASE=0x40200000
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CONFIG_SYS_MALLOC_LEN=0x2000000
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CONFIG_SPL_GPIO=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_SIZE=0x2000
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CONFIG_ENV_OFFSET=0xFFFFDE00
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CONFIG_DM_GPIO=y
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CONFIG_DEFAULT_DEVICE_TREE="imx8mn-var-som-symphony"
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CONFIG_SPL_TEXT_BASE=0x912000
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CONFIG_TARGET_IMX8MN_VAR_SOM=y
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CONFIG_SYS_PROMPT="> "
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CONFIG_OF_LIBFDT_OVERLAY=y
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CONFIG_SYS_MONITOR_LEN=524288
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CONFIG_SPL_MMC=y
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CONFIG_SPL_SERIAL=y
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CONFIG_SPL_DRIVERS_MISC=y
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CONFIG_SPL_STACK=0x980000
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CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
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CONFIG_SPL=y
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CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
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CONFIG_SYS_LOAD_ADDR=0x40480000
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CONFIG_OF_BOARD_FIXUP=y
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CONFIG_FIT=y
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CONFIG_FIT_EXTERNAL_OFFSET=0x3000
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CONFIG_SPL_LOAD_FIT=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_SYSTEM_SETUP=y
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_DEFAULT_FDT_FILE="freescale/imx8mn-var-som-symphony.dtb"
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CONFIG_BOARD_TYPES=y
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CONFIG_ARCH_MISC_INIT=y
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CONFIG_SPL_MAX_SIZE=0x25000
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CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
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CONFIG_SPL_BSS_START_ADDR=0x950000
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CONFIG_SPL_BSS_MAX_SIZE=0x2000
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CONFIG_SPL_BOARD_INIT=y
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CONFIG_SPL_BOOTROM_SUPPORT=y
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# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
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CONFIG_SYS_SPL_MALLOC=y
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CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
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CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000
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CONFIG_SYS_SPL_MALLOC_SIZE=0x80000
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
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CONFIG_SPL_I2C=y
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CONFIG_SPL_POWER=y
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CONFIG_SPL_WATCHDOG=y
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CONFIG_SYS_MAXARGS=64
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CONFIG_SYS_CBSIZE=2048
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CONFIG_SYS_PBSIZE=2067
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CONFIG_SYS_BOOTM_LEN=0x2000000
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CONFIG_CMD_FUSE=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_USB_MASS_STORAGE=y
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CONFIG_OF_CONTROL=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SYS_MMC_ENV_DEV=2
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CONFIG_SYS_MMC_ENV_PART=1
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CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
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CONFIG_USE_ETHPRIME=y
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CONFIG_ETHPRIME="FEC"
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_SPL_DM=y
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CONFIG_REGMAP=y
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CONFIG_SYSCON=y
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CONFIG_SPL_CLK_IMX8MN=y
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CONFIG_CLK_IMX8MN=y
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CONFIG_USB_FUNCTION_FASTBOOT=y
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CONFIG_FASTBOOT_BUF_ADDR=0x40480000
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CONFIG_FASTBOOT_BUF_SIZE=0x20000000
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CONFIG_FASTBOOT_FLASH=y
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CONFIG_FASTBOOT_UUU_SUPPORT=y
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CONFIG_FASTBOOT_FLASH_MMC_DEV=2
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CONFIG_MXC_GPIO=y
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CONFIG_DM_PCA953X=y
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CONFIG_DM_I2C=y
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CONFIG_SUPPORT_EMMC_BOOT=y
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CONFIG_MMC_IO_VOLTAGE=y
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CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_ES_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_FSL_USDHC=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_ATHEROS=y
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CONFIG_PHY_GIGE=y
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CONFIG_FEC_MXC=y
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CONFIG_MII=y
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CONFIG_PINCTRL=y
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CONFIG_SPL_PINCTRL=y
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CONFIG_PINCTRL_IMX8M=y
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CONFIG_DM_PMIC=y
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CONFIG_DM_PMIC_BD71837=y
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CONFIG_SPL_DM_PMIC_BD71837=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_REGULATOR_GPIO=y
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CONFIG_DM_SERIAL=y
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CONFIG_MXC_UART=y
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CONFIG_SYSRESET=y
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CONFIG_SYSRESET_PSCI=y
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CONFIG_SYSRESET_WATCHDOG=y
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CONFIG_USB=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_GADGET=y
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CONFIG_USB_GADGET_MANUFACTURER="FSL"
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CONFIG_USB_GADGET_VENDOR_NUM=0x0525
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CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
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CONFIG_CI_UDC=y
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CONFIG_IMX_WATCHDOG=y
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