mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-04 02:20:25 +00:00
ec9efcf62a
When converting CONFIG_SDCARD and CONFIG_SPIFLASH to Kconfig, one set of
uses wasn't converted correctly. Allow for the case where platforms
don't rely on "PBL" to boot but instead use other mechanisms. See the
link below for more details.
Link: https://lore.kernel.org/all/20220802091338.f4g45ldhc7qbg6hm@pali/
Fixes: d433c74eec ("Convert CONFIG_SDCARD et al to Kconfig")
Tested-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
115 lines
2.9 KiB
Text
115 lines
2.9 KiB
Text
CONFIG_PPC=y
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CONFIG_TEXT_BASE=0xEFF40000
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CONFIG_SYS_MALLOC_LEN=0x100000
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CONFIG_ENV_SIZE=0x2000
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CONFIG_ENV_SECT_SIZE=0x20000
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CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
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CONFIG_ENV_ADDR=0xEFF20000
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CONFIG_MPC85xx=y
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CONFIG_SYS_INIT_RAM_LOCK=y
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# CONFIG_CMD_ERRATA is not set
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CONFIG_TARGET_P1020RDB_PC=y
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CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
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CONFIG_ENABLE_36BIT_PHYS=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_PCIE1=y
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CONFIG_PCIE2=y
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CONFIG_PHYS_64BIT=y
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CONFIG_SYS_MONITOR_LEN=786432
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CONFIG_MP=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_NO_PBL=y
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CONFIG_BOOTDELAY=10
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CONFIG_USE_BOOTCOMMAND=y
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CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
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CONFIG_BOARD_EARLY_INIT_F=y
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CONFIG_BOARD_EARLY_INIT_R=y
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# CONFIG_MISC_INIT_R is not set
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CONFIG_HUSH_PARSER=y
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# CONFIG_AUTO_COMPLETE is not set
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CONFIG_SYS_PBSIZE=276
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CONFIG_CMD_IMLS=y
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CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
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CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
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CONFIG_CMD_I2C=y
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CONFIG_LOADS_ECHO=y
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CONFIG_SYS_LOADS_BAUD_CHANGE=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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# CONFIG_CMD_HASH is not set
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_FAT=y
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CONFIG_OF_CONTROL=y
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CONFIG_ENV_OVERWRITE=y
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CONFIG_ENV_IS_IN_FLASH=y
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CONFIG_USE_BOOTFILE=y
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CONFIG_BOOTFILE="uImage"
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CONFIG_USE_ETHPRIME=y
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CONFIG_ETHPRIME="eTSEC1"
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CONFIG_LBA48=y
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CONFIG_DDR_CLK_FREQ=66666666
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CONFIG_SYS_SPD_BUS_NUM=1
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CONFIG_CHIP_SELECTS_PER_CTRL=1
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CONFIG_SYS_DDR_RAW_TIMING=y
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CONFIG_SYS_BR0_PRELIM_BOOL=y
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CONFIG_SYS_BR0_PRELIM=0xEF001001
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CONFIG_SYS_OR0_PRELIM=0xFC000FF7
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CONFIG_SYS_BR2_PRELIM_BOOL=y
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CONFIG_SYS_BR2_PRELIM=0xFFB00801
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CONFIG_SYS_OR2_PRELIM=0xFFFE09FF
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CONFIG_SYS_BR3_PRELIM_BOOL=y
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CONFIG_SYS_BR3_PRELIM=0xFFA00801
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CONFIG_SYS_OR3_PRELIM=0xFFF009F7
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CONFIG_COMMON_INIT_DDR=y
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CONFIG_SPL_COMMON_INIT_DDR=y
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CONFIG_DM_I2C=y
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CONFIG_SPL_SYS_I2C_LEGACY=y
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CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
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CONFIG_SYS_I2C_FSL=y
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CONFIG_SYS_FSL_I2C_OFFSET=0x3000
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CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
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CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
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CONFIG_SYS_I2C_EEPROM_ADDR=0x52
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CONFIG_FSL_ESDHC=y
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CONFIG_MTD=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_SYS_FLASH_EMPTY_INFO=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_SYS_FLASH_QUIET_TEST=y
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CONFIG_SYS_MAX_FLASH_SECT=128
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_SPEED=10000000
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_PHY_ATHEROS=y
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CONFIG_PHY_BROADCOM=y
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CONFIG_PHY_DAVICOM=y
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CONFIG_PHY_LXT=y
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CONFIG_PHY_MARVELL=y
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CONFIG_PHY_NATSEMI=y
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CONFIG_PHY_REALTEK=y
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CONFIG_PHY_SMSC=y
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CONFIG_PHY_VITESSE=y
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CONFIG_PHY_FIXED=y
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CONFIG_DM_MDIO=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_MII=y
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CONFIG_TSEC_ENET=y
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CONFIG_PCIE_FSL=y
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CONFIG_DM_RTC=y
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CONFIG_SYS_NS16550=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_FSL_ESPI=y
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CONFIG_USB=y
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CONFIG_USB_EHCI_FSL=y
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CONFIG_USB_MAX_CONTROLLER_COUNT=2
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CONFIG_USB_STORAGE=y
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CONFIG_ADDR_MAP=y
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