mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-14 17:07:38 +00:00
8c103c33fb
Now that Linux has accepted these tags, move the device tree files in U-Boot over to use them. Signed-off-by: Simon Glass <sjg@chromium.org>
205 lines
4 KiB
Text
205 lines
4 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
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*/
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#include <dt-bindings/clock/bcm6348-clock.h>
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#include <dt-bindings/dma/bcm6348-dma.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/reset/bcm6348-reset.h>
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#include "skeleton.dtsi"
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/ {
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compatible = "brcm,bcm6348";
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aliases {
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spi0 = &spi;
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};
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cpus {
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reg = <0xfffe0000 0x4>;
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#address-cells = <1>;
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#size-cells = <0>;
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bootph-all;
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cpu@0 {
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compatible = "brcm,bcm6348-cpu", "mips,mips4Kc";
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device_type = "cpu";
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reg = <0>;
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bootph-all;
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};
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};
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clocks {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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bootph-all;
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periph_osc: periph-osc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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bootph-all;
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};
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periph_clk: periph-clk {
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compatible = "brcm,bcm6345-clk";
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reg = <0xfffe0004 0x4>;
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#clock-cells = <1>;
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};
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};
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pflash: nor@1fc00000 {
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compatible = "cfi-flash";
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reg = <0x1fc00000 0x2000000>;
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bank-width = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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status = "disabled";
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};
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ubus {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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bootph-all;
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pll_cntl: syscon@fffe0008 {
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compatible = "syscon";
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reg = <0xfffe0008 0x4>;
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};
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syscon-reboot {
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compatible = "syscon-reboot";
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regmap = <&pll_cntl>;
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offset = <0x0>;
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mask = <0x1>;
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};
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periph_rst: reset-controller@fffe0028 {
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compatible = "brcm,bcm6345-reset";
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reg = <0xfffe0028 0x4>;
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#reset-cells = <1>;
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};
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wdt: watchdog@fffe021c {
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compatible = "brcm,bcm6345-wdt";
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reg = <0xfffe021c 0xc>;
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clocks = <&periph_osc>;
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};
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wdt-reboot {
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compatible = "wdt-reboot";
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wdt = <&wdt>;
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};
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uart0: serial@fffe0300 {
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compatible = "brcm,bcm6345-uart";
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reg = <0xfffe0300 0x18>;
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clocks = <&periph_osc>;
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status = "disabled";
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};
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gpio1: gpio-controller@fffe0400 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0xfffe0400 0x4>, <0xfffe0408 0x4>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <5>;
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status = "disabled";
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};
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gpio0: gpio-controller@fffe0404 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0xfffe0404 0x4>, <0xfffe040c 0x4>;
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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spi: spi@fffe0c00 {
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compatible = "brcm,bcm6348-spi";
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reg = <0xfffe0c00 0xc0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&periph_clk BCM6348_CLK_SPI>;
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resets = <&periph_rst BCM6348_RST_SPI>;
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spi-max-frequency = <20000000>;
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num-cs = <4>;
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status = "disabled";
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};
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ohci: usb-controller@fffe1b00 {
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compatible = "brcm,bcm6348-ohci", "generic-ohci";
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reg = <0xfffe1b00 0x100>;
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phys = <&usbh>;
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big-endian;
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status = "disabled";
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};
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usbh: usb-phy@fffe1c00 {
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compatible = "brcm,bcm6348-usbh";
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reg = <0xfffe1c00 0x4>;
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#phy-cells = <0>;
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clocks = <&periph_clk BCM6348_CLK_USBH>;
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clock-names = "usbh";
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resets = <&periph_rst BCM6348_RST_USBH>;
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status = "disabled";
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};
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memory-controller@fffe2300 {
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compatible = "brcm,bcm6338-mc";
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reg = <0xfffe2300 0x38>;
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bootph-all;
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};
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enet0: ethernet@fffe6000 {
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compatible = "brcm,bcm6348-enet";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xfffe6000 0x2dc>;
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dmas = <&iudma BCM6348_DMA_ENET0_RX>,
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<&iudma BCM6348_DMA_ENET0_TX>;
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dma-names = "rx",
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"tx";
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status = "disabled";
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};
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enet1: ethernet@fffe6800 {
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compatible = "brcm,bcm6348-enet";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xfffe6800 0x2dc>;
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dmas = <&iudma BCM6348_DMA_ENET1_RX>,
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<&iudma BCM6348_DMA_ENET1_TX>;
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dma-names = "rx",
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"tx";
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status = "disabled";
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};
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iudma: dma-controller@fffe7000 {
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compatible = "brcm,bcm6348-iudma";
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reg = <0xfffe7000 0x1c>,
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<0xfffe7100 0x40>,
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<0xfffe7200 0x40>;
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reg-names = "dma",
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"dma-channels",
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"dma-sram";
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#dma-cells = <1>;
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dma-channels = <4>;
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clocks = <&periph_clk BCM6348_CLK_ENET>;
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resets = <&periph_rst BCM6348_RST_ENET>,
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<&periph_rst BCM6348_RST_DMAMEM>;
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};
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};
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};
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