mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-11 15:37:23 +00:00
a55d48174c
MIPS port has two problems in timer routines. One is now we assume CFG_HZ equals to CP0 counter frequency, but this is wrong. CFG_HZ has to be 1000 in the U-Boot system. The other is we don't have a proper time management counter like timestamp other ARCHs have. We need the 32-bit millisecond clock counter. This patch introduces timestamp and CYCLES_PER_JIFFY. timestamp is a 32-bit non-overflowing CFG_HZ counter, and CYCLES_PER_JIFFY is the number of calculated CP0 counter cycles in a CFG_HZ. STRATEGY: * Fix improper CFG_HZ value to have 1000 * Use CFG_MIPS_TIMER_FREQ for timer counter frequency, instead. * timer_init: initialize timestamp and set up the first timer expiration. Note that we don't need to initialize CP0 count/compare registers here as they have been already zeroed out on the system reset. Leave them as they are. * get_timer: calculate how many timestamps have been passed, then return base-relative timestamp. Make sure we can easily count missed timestamps regardless of CP0 count/compare value. * get_ticks: return the current timestamp, that is get_timer(0). Most parts are from good old Linux v2.6.16 kernel. v2: - Remove FIXME comments as they turned out to be trivial. - Use CP0 compare register as a global variable for expirelo. - Kill a global variable 'cycles_per_jiffy'. Use #define CYCLES_PER_JIFFY instead. Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
193 lines
5.7 KiB
C
193 lines
5.7 KiB
C
/*
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* (C) Copyright 2003
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* Masami Komiya <mkomiya@sonare.it>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* Config header file for TANBAC TB0229 board using an VR4131 CPU module
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_MIPS32 1 /* MIPS 4Kc CPU core */
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#define CONFIG_TB0229 1 /* on a TB0229 Board */
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#ifndef CPU_CLOCK_RATE
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#define CPU_CLOCK_RATE 200000000 /* 200 MHz clock for the MIPS core */
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#endif
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#define CPU_TCLOCK_RATE 16588800 /* 16.5888 MHz for TClock */
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
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#define CONFIG_BAUDRATE 115200
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#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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#define CONFIG_TIMESTAMP /* Print image info with timestamp */
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#define CONFIG_PREBOOT "echo;" \
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"echo Type \\\"boot\\\" for the network boot using DHCP, TFTP and NFS;" \
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"echo Type \\\"run netboot_initrd\\\" for the network boot with initrd;" \
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"echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
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"echo Type \\\"run flash_local\\\" to mount local root filesystem;" \
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"echo"
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#undef CONFIG_BOOTARGS
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"netboot=dhcp;tftp;run netargs; bootm\0" \
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"nfsargs=setenv bootargs root=/dev/nfs ip=dhcp\0" \
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"localargs=setenv bootargs root=1F02 ip=dhcp\0" \
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"addmisc=setenv bootargs ${bootargs} " \
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"console=ttyS0,${baudrate} " \
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"read-only=readonly\0" \
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"netargs=run nfsargs addmisc\0" \
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"flash_nfs=run nfsargs addmisc;" \
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"bootm ${kernel_addr}\0" \
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"flash_local=run localargs addmisc;" \
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"bootm ${kernel_addr}\0" \
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"netboot_initrd=dhcp;tftp;tftp 80600000 initrd;" \
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"setenv bootargs root=/dev/ram ramdisk_size=8192 ip=dhcp;"\
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"run addmisc;" \
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"bootm 80400000 80600000\0" \
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"rootpath=/export/miniroot-mipsel\0" \
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"autoload=no\0" \
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"kernel_addr=BFC60000\0" \
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"ramdisk_addr=B0100000\0" \
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"u-boot=u-boot.bin\0" \
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"bootfile=uImage\0" \
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"load=dhcp;tftp 80400000 ${u-boot}\0" \
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"load_kernel=dhcp;tftp 80400000 ${bootfile}\0" \
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"update_uboot=run load;" \
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"protect off BFC00000 BFC3FFFF;" \
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"erase BFC00000 BFC3FFFF;" \
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"cp.b 80400000 BFC00000 ${filesize}\0" \
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"update_kernel=run load_kernel;" \
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"erase BFC60000 BFD5FFFF;" \
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"cp.b 80400000 BFC60000 ${filesize}\0" \
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"initenv=erase bfc40000 bfc5ffff\0" \
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""
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/*#define CONFIG_BOOTCOMMAND "run flash_local" */
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#define CONFIG_BOOTCOMMAND "run netboot"
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_ASKENV
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_PCI
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#define CONFIG_CMD_ELF
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/*
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* Miscellaneous configurable options
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*/
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#define CFG_LONGHELP /* undef to save memory */
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#define CFG_PROMPT "# " /* Monitor Command Prompt */
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#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
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#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
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#define CFG_MAXARGS 16 /* max number of command args*/
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#define CFG_MALLOC_LEN 128*1024
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#define CFG_BOOTPARAMS_LEN 128*1024
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#define CFG_MIPS_TIMER_FREQ (CPU_TCLOCK_RATE/4)
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#define CFG_HZ 1000
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#define CFG_SDRAM_BASE 0x80000000
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#define CFG_LOAD_ADDR 0x80400000 /* default load address */
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#define CFG_MEMTEST_START 0x80000000
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#define CFG_MEMTEST_END 0x80800000
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
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#define PHYS_FLASH_1 0xbfc00000 /* Flash Bank #1 */
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/* The following #defines are needed to get flash environment right */
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#define CFG_MONITOR_BASE TEXT_BASE
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#define CFG_MONITOR_LEN (192 << 10)
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#define CFG_INIT_SP_OFFSET 0x400000
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#define CFG_FLASH_BASE PHYS_FLASH_1
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/* timeout values are in ticks */
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#define CFG_FLASH_ERASE_TOUT (20 * CFG_HZ) /* Timeout for Flash Erase */
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#define CFG_FLASH_WRITE_TOUT (2 * CFG_HZ) /* Timeout for Flash Write */
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#define CFG_ENV_IS_IN_FLASH 1
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/* Address and size of Primary Environment Sector */
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#define CFG_ENV_ADDR 0xBFC40000
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#define CFG_ENV_SIZE 0x20000
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#define CFG_DIRECT_FLASH_TFTP
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#define CONFIG_NR_DRAM_BANKS 1
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/*-----------------------------------------------------------------------
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* Cache Configuration
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*/
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#define CFG_DCACHE_SIZE 16384
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#define CFG_ICACHE_SIZE 16384
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#define CFG_CACHELINE_SIZE 16
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/*-----------------------------------------------------------------------
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* Serial Configuration
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*/
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#define CFG_NS16550
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#define CFG_NS16550_SERIAL
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#define CFG_NS16550_REG_SIZE 1
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#define CFG_NS16550_CLK 18432000
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#define CFG_NS16550_COM1 0xaf000800
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/*-----------------------------------------------------------------------
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* PCI stuff
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*/
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#define CONFIG_PCI
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#define CONFIG_PCI_PNP
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#define CONFIG_NET_MULTI
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#define CONFIG_EEPRO100
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#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
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#define CONFIG_RTL8139
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#endif /* __CONFIG_H */
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