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https://github.com/AsahiLinux/u-boot
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12fdacea5a
Use spl_dcache_enable, in place of setup_dram, arch_reserve_mmu to set up pagetable, initialise DRAM and enable Dcache to avoid multiple function calls. Check for CONFIG_SPL_VIDEO in place of CONFIG_SPL_VIDEO_TIDSS to prevent any build failure in case video config is not defined and video related functions are called. Check for CONFIG_SPL_SPLASH_SCREEN and CONFIG_SPL_BMP before calling splash_display to avoid compilation failure. Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
138 lines
2.7 KiB
C
138 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Board specific initialization for AM62x platforms
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*
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* Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
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* Suman Anna <s-anna@ti.com>
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*
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*/
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#include <env.h>
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#include <spl.h>
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#include <init.h>
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#include <video.h>
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#include <splash.h>
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#include <cpu_func.h>
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#include <k3-ddrss.h>
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#include <fdt_support.h>
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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#include <dm/uclass.h>
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DECLARE_GLOBAL_DATA_PTR;
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#if CONFIG_IS_ENABLED(SPLASH_SCREEN)
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static struct splash_location default_splash_locations[] = {
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{
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.name = "sf",
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.storage = SPLASH_STORAGE_SF,
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.flags = SPLASH_STORAGE_RAW,
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.offset = 0x700000,
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},
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{
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.name = "mmc",
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.storage = SPLASH_STORAGE_MMC,
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.flags = SPLASH_STORAGE_FS,
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.devpart = "1:1",
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},
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};
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int splash_screen_prepare(void)
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{
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return splash_source_load(default_splash_locations,
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ARRAY_SIZE(default_splash_locations));
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}
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#endif
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int board_init(void)
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{
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return 0;
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}
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int dram_init(void)
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{
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return fdtdec_setup_mem_size_base();
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}
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int dram_init_banksize(void)
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{
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return fdtdec_setup_memory_banksize();
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}
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#if defined(CONFIG_SPL_BUILD)
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static int video_setup(void)
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{
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if (CONFIG_IS_ENABLED(VIDEO)) {
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ulong addr;
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int ret;
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addr = gd->relocaddr;
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ret = video_reserve(&addr);
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if (ret)
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return ret;
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debug("Reserving %luk for video at: %08lx\n",
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((unsigned long)gd->relocaddr - addr) >> 10, addr);
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gd->relocaddr = addr;
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}
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return 0;
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}
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void spl_board_init(void)
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{
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video_setup();
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enable_caches();
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if (IS_ENABLED(CONFIG_SPL_SPLASH_SCREEN) && IS_ENABLED(CONFIG_SPL_BMP))
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splash_display();
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}
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#if defined(CONFIG_K3_AM64_DDRSS)
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static void fixup_ddr_driver_for_ecc(struct spl_image_info *spl_image)
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{
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struct udevice *dev;
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int ret;
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dram_init_banksize();
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ret = uclass_get_device(UCLASS_RAM, 0, &dev);
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if (ret)
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panic("Cannot get RAM device for ddr size fixup: %d\n", ret);
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ret = k3_ddrss_ddr_fdt_fixup(dev, spl_image->fdt_addr, gd->bd);
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if (ret)
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printf("Error fixing up ddr node for ECC use! %d\n", ret);
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}
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#else
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static void fixup_memory_node(struct spl_image_info *spl_image)
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{
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u64 start[CONFIG_NR_DRAM_BANKS];
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u64 size[CONFIG_NR_DRAM_BANKS];
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int bank;
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int ret;
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dram_init();
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dram_init_banksize();
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for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
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start[bank] = gd->bd->bi_dram[bank].start;
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size[bank] = gd->bd->bi_dram[bank].size;
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}
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/* dram_init functions use SPL fdt, and we must fixup u-boot fdt */
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ret = fdt_fixup_memory_banks(spl_image->fdt_addr, start, size,
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CONFIG_NR_DRAM_BANKS);
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if (ret)
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printf("Error fixing up memory node! %d\n", ret);
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}
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#endif
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void spl_perform_fixups(struct spl_image_info *spl_image)
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{
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#if defined(CONFIG_K3_AM64_DDRSS)
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fixup_ddr_driver_for_ecc(spl_image);
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#else
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fixup_memory_node(spl_image);
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#endif
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}
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#endif
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