mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-26 13:03:40 +00:00
95c3b0635e
Sync the devicetree files from the official Linux kernel tree, v6.6-rc6. This is covering Allwinner SoCs with 64-bit ARM cores. Only small cosmetic changes (clock name fixed), but we add the DT for the new OrangePi Zero 3 board, for which U-Boot enablement patches are pending. As before, this omits the non-backwards compatible changes to the R_INTC controller, to remain compatible with older kernels. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
134 lines
2.8 KiB
Text
134 lines
2.8 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2020 Arm Ltd.
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*
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* DT nodes common between Orange Pi Zero 2 and Orange Pi Zero 3.
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* Excludes PMIC nodes and properties, since they are different between the two.
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*/
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#include "sun50i-h616.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/leds/common.h>
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/ {
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aliases {
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ethernet0 = &emac0;
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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leds {
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compatible = "gpio-leds";
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led-0 {
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_RED>;
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gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
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default-state = "on";
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};
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led-1 {
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function = LED_FUNCTION_STATUS;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
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};
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};
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reg_vcc5v: vcc5v {
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/* board wide 5V supply directly from the USB-C socket */
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compatible = "regulator-fixed";
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regulator-name = "vcc-5v";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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reg_usb1_vbus: regulator-usb1-vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb1-vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <®_vcc5v>;
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enable-active-high;
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gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
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};
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};
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&ehci1 {
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status = "okay";
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};
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/* USB 2 & 3 are on headers only. */
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&emac0 {
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pinctrl-names = "default";
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pinctrl-0 = <&ext_rgmii_pins>;
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phy-mode = "rgmii";
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phy-handle = <&ext_rgmii_phy>;
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allwinner,rx-delay-ps = <3100>;
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allwinner,tx-delay-ps = <700>;
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status = "okay";
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};
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&mdio0 {
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ext_rgmii_phy: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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};
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};
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&mmc0 {
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cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
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bus-width = <4>;
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status = "okay";
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};
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&ohci1 {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>;
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <40000000>;
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};
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_ph_pins>;
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status = "okay";
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};
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&usbotg {
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/*
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* PHY0 pins are connected to a USB-C socket, but a role switch
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* is not implemented: both CC pins are pulled to GND.
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* The VBUS pins power the device, so a fixed peripheral mode
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* is the best choice.
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* The board can be powered via GPIOs, in this case port0 *can*
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* act as a host (with a cable/adapter ignoring CC), as VBUS is
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* then provided by the GPIOs. Any user of this setup would
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* need to adjust the DT accordingly: dr_mode set to "host",
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* enabling OHCI0 and EHCI0.
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*/
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dr_mode = "peripheral";
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status = "okay";
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};
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&usbphy {
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usb1_vbus-supply = <®_usb1_vbus>;
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status = "okay";
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};
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