mirror of
https://github.com/AsahiLinux/u-boot
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6bd39dee63
The USB_PWR signal operation is not reliable on this DWC3 controller instance in case the signal is active high. Switch to GPIO control, which always behaves correctly. Perform the change in u-boot extras until this hits Linux upstream. Signed-off-by: Marek Vasut <marex@denx.de>
160 lines
2 KiB
Text
160 lines
2 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2022 Marek Vasut <marex@denx.de>
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*/
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#include "imx8mp-u-boot.dtsi"
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#include "imx8mp-pinfunc.h"
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/ {
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aliases {
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eeprom0 = &eeprom;
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mmc0 = &usdhc3; /* eMMC */
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mmc1 = &usdhc2; /* MicroSD */
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spi0 = &ecspi1;
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};
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config {
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dmo,ram-coding-gpios = <&gpio3 20 0>, <&gpio4 3 0>, <&gpio4 1 0>;
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};
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reg_usb1_vbus: regulator-usb1-vbus {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb1_vbus>;
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regulator-max-microvolt = <5000000>;
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regulator-min-microvolt = <5000000>;
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regulator-name = "USB1_PWR";
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};
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wdt-reboot {
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compatible = "wdt-reboot";
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wdt = <&wdog1>;
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bootph-pre-ram;
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};
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};
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&buck4 {
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bootph-pre-ram;
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};
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&buck5 {
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bootph-pre-ram;
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};
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&ecspi1 {
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bootph-pre-ram;
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flash@0 {
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bootph-pre-ram;
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};
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};
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&eqos {
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/delete-property/ assigned-clocks;
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/delete-property/ assigned-clock-parents;
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/delete-property/ assigned-clock-rates;
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};
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&gpio1 {
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bootph-pre-ram;
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};
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&gpio2 {
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bootph-pre-ram;
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};
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&gpio3 {
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bootph-pre-ram;
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};
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&gpio4 {
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bootph-pre-ram;
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};
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&gpio5 {
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bootph-pre-ram;
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};
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&i2c3 {
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bootph-pre-ram;
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};
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&pinctrl_ecspi1 {
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bootph-pre-ram;
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};
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&pinctrl_hog_sbc {
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bootph-pre-ram;
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};
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&pinctrl_i2c3 {
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bootph-pre-ram;
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};
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&pinctrl_i2c3_gpio {
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bootph-pre-ram;
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};
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&pinctrl_pmic {
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bootph-pre-ram;
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};
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&pinctrl_uart3 {
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bootph-pre-ram;
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};
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&pinctrl_usdhc2 {
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bootph-pre-ram;
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};
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&pinctrl_usdhc3 {
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bootph-pre-ram;
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};
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&pmic {
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bootph-pre-ram;
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regulators {
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bootph-pre-ram;
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};
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};
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&uart3 {
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bootph-pre-ram;
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};
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&usb3_phy0 {
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vbus-supply = <®_usb1_vbus>;
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};
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&usdhc2 {
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bootph-pre-ram;
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sd-uhs-sdr104;
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sd-uhs-ddr50;
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};
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&usdhc3 {
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bootph-pre-ram;
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mmc-hs400-1_8v;
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mmc-hs400-enhanced-strobe;
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};
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&wdog1 {
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bootph-pre-ram;
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};
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&iomuxc {
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usb1-grp {
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fsl,pins = <
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MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC 0x80
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>;
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};
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pinctrl_usb1_vbus: usb1-vbus-grp {
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fsl,pins = <
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MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x6
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>;
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};
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};
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