mirror of
https://github.com/AsahiLinux/u-boot
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5f603761c3
This patch enables the workaround for ARM errata 798870 for OMAP5 / DRA7 which says "If back-to-back speculative cache line fills (fill A and fill B) are issued from the L1 data cache of a CPU to the L2 cache, the second request (fill B) is then cancelled, and the second request would have detected a hazard against a recent write or eviction (write B) to the same cache line as fill B then the L2 logic might deadlock." An l2auxctlr accessor implementation for OMAP5 and DRA7 is introduced here as well. Signed-off-by: Praveen Rao <prao@ti.com> Signed-off-by: Angela Stegmaier <angelabaker@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
169 lines
4.8 KiB
C
169 lines
4.8 KiB
C
/*
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* (C) Copyright 2013
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* Texas Instruments Incorporated.
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* Sricharan R <r.sricharan@ti.com>
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*
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* Derived from OMAP4 done by:
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* Aneesh V <aneesh@ti.com>
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*
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* TI OMAP5 AND DRA7XX common configuration settings
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* For more details, please see the technical documents listed at
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* http://www.ti.com/product/omap5432
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*/
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#ifndef __CONFIG_TI_OMAP5_COMMON_H
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#define __CONFIG_TI_OMAP5_COMMON_H
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_ARCH_CPU_INIT
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/* Common ARM Erratas */
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#define CONFIG_ARM_ERRATA_798870
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#define CONFIG_SYS_CACHELINE_SIZE 64
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/* Use General purpose timer 1 */
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#define CONFIG_SYS_TIMERBASE GPT2_BASE
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/*
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* For the DDR timing information we can either dynamically determine
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* the timings to use or use pre-determined timings (based on using the
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* dynamic method. Default to the static timing infomation.
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*/
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#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
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#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
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#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
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#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
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#endif
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_PALMAS_POWER
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#endif
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#include <asm/arch/cpu.h>
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#include <asm/arch/omap.h>
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#include <configs/ti_armv7_common.h>
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/*
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* Hardware drivers
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*/
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK 48000000
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/* Per-SoC commands */
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#undef CONFIG_CMD_NET
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#undef CONFIG_CMD_NFS
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/*
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* Environment setup
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*/
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#ifndef PARTS_DEFAULT
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#define PARTS_DEFAULT
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#endif
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#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
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#define CONFIG_EXTRA_ENV_SETTINGS \
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DEFAULT_LINUX_BOOT_ENV \
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"console=" CONSOLEDEV ",115200n8\0" \
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"fdtfile=undefined\0" \
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"bootpart=0:2\0" \
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"bootdir=/boot\0" \
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"bootfile=zImage\0" \
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"usbtty=cdc_acm\0" \
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"vram=16M\0" \
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"partitions=" PARTS_DEFAULT "\0" \
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"optargs=\0" \
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"mmcdev=0\0" \
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"mmcroot=/dev/mmcblk0p2 rw\0" \
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"mmcrootfstype=ext4 rootwait\0" \
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"mmcargs=setenv bootargs console=${console} " \
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"${optargs} " \
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"vram=${vram} " \
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"root=${mmcroot} " \
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"rootfstype=${mmcrootfstype}\0" \
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"netargs=setenv bootargs console=${console} " \
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"${optargs} " \
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"root=/dev/nfs " \
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"nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
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"ip=dhcp\0" \
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"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
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"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
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"source ${loadaddr}\0" \
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"bootenv=uEnv.txt\0" \
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"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
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"importbootenv=echo Importing environment from mmc${mmcdev} ...; " \
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"env import -t ${loadaddr} ${filesize}\0" \
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"loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
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"mmcboot=mmc dev ${mmcdev}; " \
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"if mmc rescan; then " \
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"echo SD/MMC found on device ${mmcdev};" \
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"if run loadbootenv; then " \
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"echo Loaded environment from ${bootenv};" \
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"run importbootenv;" \
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"fi;" \
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"if test -n $uenvcmd; then " \
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"echo Running uenvcmd ...;" \
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"run uenvcmd;" \
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"fi;" \
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"if run loadimage; then " \
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"run loadfdt; " \
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"echo Booting from mmc${mmcdev} ...; " \
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"run mmcargs; " \
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"bootz ${loadaddr} - ${fdtaddr}; " \
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"fi;" \
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"fi;\0" \
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"netboot=echo Booting from network ...; " \
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"set env autoload no; " \
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"dhcp; " \
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"tftp ${loadaddr} ${bootfile}; " \
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"tftp ${fdtaddr} ${fdtfile}; " \
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"run netargs; " \
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"bootz ${loadaddr} - ${fdtaddr}\0" \
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"findfdt="\
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"if test $board_name = omap5_uevm; then " \
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"setenv fdtfile omap5-uevm.dtb; fi; " \
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"if test $board_name = dra7xx; then " \
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"setenv fdtfile dra7-evm.dtb; fi;" \
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"if test $board_name = dra72x; then " \
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"setenv fdtfile dra72-evm.dtb; fi;" \
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"if test $board_name = beagle_x15; then " \
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"setenv fdtfile am57xx-beagle-x15.dtb; fi;" \
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"if test $fdtfile = undefined; then " \
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"echo WARNING: Could not determine device tree to use; fi; \0" \
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"loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile};\0" \
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#define CONFIG_BOOTCOMMAND \
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"run findfdt; " \
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"run mmcboot;" \
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"setenv mmcdev 1; " \
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"setenv bootpart 1:2; " \
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"setenv mmcroot /dev/mmcblk0p2 rw; " \
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"run mmcboot;" \
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/*
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* SPL related defines. The Public RAM memory map the ROM defines the
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* area between 0x40300000 and 0x4031E000 as a download area for OMAP5
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* (dra7xx is larger, but we do not need to be larger at this time). We
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* set CONFIG_SPL_DISPLAY_PRINT to have omap_rev_string() called and
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* print some information.
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*/
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#define CONFIG_SPL_TEXT_BASE 0x40300000
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#define CONFIG_SPL_MAX_SIZE (0x4031E000 - CONFIG_SPL_TEXT_BASE)
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#define CONFIG_SPL_DISPLAY_PRINT
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#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
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#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
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(128 << 20))
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#ifdef CONFIG_NAND
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#define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */
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#endif
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#endif /* __CONFIG_TI_OMAP5_COMMON_H */
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