u-boot/arch/arm/dts/sun7i-a20-olimex-som-evb-emmc.dts
Jagan Teki 0cc47a8ead arm: allwinner: dts: a20: Sync A20 dts(i) files from Linux 5.1-rc2
Sync sun7i-a20 dts(i) files from Linux 5.1-rc2

Linux commit details about the sun7i-a20* sync:
"ARM: dts: sun7i: bananapi: Add GPIO banks regulators"
(sha1: 09c6572290f018d73ec2e812e28bada34d41815f)

Here are U-Boot specific dts changes.

- s/uart0_pins_a/uart0_pb_pins for
  sun7i-a20-ainol-aw1.dts
  sun7i-a20-m5.dts
  sun7i-a20-primo73.dts
  sun7i-a20-yones-toptech-bd1078.dts
  sunxi-itead-core-common.dtsi
- s/gmac_pins_mii_a/gmac_rgmii_pins for
  sun7i-a20-m5.dts
- drop i2c0, i2c1 pins from
  sunxi-itead-core-common.dtsi
- drop mmc0 pins from
  sun7i-a20-primo73.dts

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 14:34:45 +05:30

35 lines
681 B
Text

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree Source for A20-Olimex-SOM-EVB-eMMC Board
*
* Copyright (C) 2018 Olimex Ltd.
* Author: Stefan Mavrodiev <stefan@olimex.com>
*/
/dts-v1/;
#include "sun7i-a20-olimex-som-evb.dts"
/ {
model = "Olimex A20-Olimex-SOM-EVB-eMMC";
compatible = "olimex,a20-olimex-som-evb-emmc", "allwinner,sun7i-a20";
mmc2_pwrseq: mmc2_pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&pio 2 18 GPIO_ACTIVE_LOW>;
};
};
&mmc2 {
vmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&mmc2_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
emmc: emmc@0 {
reg = <0>;
compatible = "mmc-card";
broken-hpi;
};
};