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3d5f45c95c
The RPC HF might be locked by ATF, and any access to its register space would result in complete hang. Disable the RPC HF by default. The ATF should be patched to set RPC node status = "okay" in the DT fragment it passes to U-Boot in case the RPC HF access is unlocked, and that way U-Boot could access the RPC HF safely. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
61 lines
1 KiB
Text
61 lines
1 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source extras for U-Boot for the ULCB board
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*
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* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
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*/
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#include "r8a77950-ulcb.dts"
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#include "r8a77950-u-boot.dtsi"
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/ {
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cpld {
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compatible = "renesas,ulcb-cpld";
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status = "okay";
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gpio-sck = <&gpio6 8 0>;
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gpio-mosi = <&gpio6 7 0>;
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gpio-miso = <&gpio6 10 0>;
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gpio-sstbz = <&gpio2 3 0>;
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};
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sysinfo {
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compatible = "renesas,rcar-sysinfo";
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i2c-eeprom = <&sysinfo_eeprom>;
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u-boot,dm-pre-reloc;
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};
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};
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&i2c_dvfs {
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u-boot,dm-pre-reloc;
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sysinfo_eeprom: eeprom@50 {
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compatible = "rohm,br24t01", "atmel,24c01";
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reg = <0x50>;
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pagesize = <8>;
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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};
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&rpc {
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reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
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status = "disabled";
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};
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&sdhi0 {
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sd-uhs-sdr12;
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sd-uhs-sdr25;
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sd-uhs-sdr104;
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max-frequency = <208000000>;
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};
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&sdhi2 {
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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max-frequency = <200000000>;
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};
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&vcc_sdhi0 {
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u-boot,off-on-delay-us = <20000>;
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};
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