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https://github.com/AsahiLinux/u-boot
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b9d0f00a9d
This adds platform code and the device tree for the Phytium Pomelo Board. The initial support comprises the UART and the PCIE. Signed-off-by: weichangzheng <nicholas_zheng@outlook.com>
50 lines
1.2 KiB
Text
50 lines
1.2 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* dts file for Phytium Pomelo board
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* Copyright (C) 2021, Phytium Ltd.
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* lixinde <lixinde@phytium.com.cn>
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* weichangzheng <weichangzheng@phytium.com.cn>
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*/
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/dts-v1/;
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/ {
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model = "Phytium Pomelo Board";
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compatible = "phytium,d2000-pomelo", "phytium,d2000";
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#address-cells = <2>;
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#size-cells = <2>;
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aliases {
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serial0 = &uart0;
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};
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sysclk_48mhz: clk48mhz {
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compatible = "fixed-clock";
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#clock-cells = <0x0>;
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clock-frequency = <48000000>;
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clock-output-names = "sysclk_48mhz";
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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uart0: serial@28001000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x0 0x28001000 0x0 0x1000>;
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clocks = <&sysclk_48mhz>;
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};
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pcie@40000000 {
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compatible = "pci-host-ecam-generic";
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device_type = "pci";
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#address-cells = <3>;
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#size-cells = <2>;
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reg = <0x0 0x40000000 0x0 0x10000000>;
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ranges = <0x01000000 0x00 0x00000000 0x0 0x50000000 0x0 0x00F00000>,
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<0x02000000 0x00 0x58000000 0x0 0x58000000 0x0 0x28000000>,
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<0x43000000 0x10 0x00000000 0x10 0x00000000 0x10 0x00000000>;
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};
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};
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};
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