mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-11 07:34:31 +00:00
489c428763
During the LS1028A-RDB sync with Linux device trees, it was observed that the same RTC is present on the two boards, and the wrong compatible string is used in both places. This change updates the RTC from the LS1088A-QDS to use the compatible string that was established in Linux. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: Michael Walle <michael@walle.cc>
186 lines
3.1 KiB
Text
186 lines
3.1 KiB
Text
// SPDX-License-Identifier: GPL-2.0+ OR X11
|
|
/*
|
|
* NXP ls1088a QDS common board device tree source
|
|
*
|
|
* Copyright 2017-2020 NXP
|
|
*/
|
|
|
|
#include "fsl-ls1088a.dtsi"
|
|
|
|
/ {
|
|
aliases {
|
|
spi0 = &qspi;
|
|
spi1 = &dspi;
|
|
};
|
|
};
|
|
|
|
&emdio1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&emdio2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c0 {
|
|
status = "okay";
|
|
u-boot,dm-pre-reloc;
|
|
|
|
fpga@66 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "simple-mfd";
|
|
reg = <0x66>;
|
|
|
|
mux-mdio@54 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "mdio-mux-i2creg";
|
|
reg = <0x54>;
|
|
#mux-control-cells = <1>;
|
|
mux-reg-masks = <0x54 0xe0>; // reg 0x54, bits 7:5
|
|
mdio-parent-bus = <&emdio1>;
|
|
|
|
mdio@00 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x00>;
|
|
|
|
rgmii_phy1: ethernet-phy@1 {
|
|
reg = <0x1>;
|
|
};
|
|
};
|
|
mdio@20 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x20>;
|
|
|
|
rgmii_phy2: ethernet-phy@2 {
|
|
reg = <0x2>;
|
|
};
|
|
};
|
|
|
|
emdio1_slot1: mdio@40 { /* I/O Slot #1 */
|
|
reg = <0x40>;
|
|
device-name = "emdio1_slot1";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|
|
|
|
emdio1_slot3: mdio@60 { /* I/O Slot #3 */
|
|
reg = <0x60>;
|
|
device-name = "emdio1_slot3";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
i2c-mux@77 {
|
|
compatible = "nxp,pca9547";
|
|
reg = <0x77>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
i2c@3 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x3>;
|
|
|
|
rtc@51 {
|
|
compatible = "nxp,pcf2129";
|
|
reg = <0x51>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&ifc {
|
|
#address-cells = <2>;
|
|
#size-cells = <1>;
|
|
/* NOR, NAND Flashes and FPGA on board */
|
|
ranges = <0 0 0x5 0x80000000 0x08000000
|
|
2 0 0x5 0x30000000 0x00010000
|
|
3 0 0x5 0x20000000 0x00010000>;
|
|
status = "okay";
|
|
|
|
nor@0,0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "cfi-flash";
|
|
reg = <0x0 0x0 0x8000000>;
|
|
bank-width = <2>;
|
|
device-width = <1>;
|
|
};
|
|
|
|
nand@2,0 {
|
|
compatible = "fsl,ifc-nand";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
reg = <0x1 0x0 0x10000>;
|
|
};
|
|
|
|
fpga: board-control@3,0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "simple-bus", "fsl,ls1088aqds-fpga",
|
|
"fsl,fpga-qixis";
|
|
reg = <0x2 0x0 0x0000100>;
|
|
bank-width = <1>;
|
|
device-width = <1>;
|
|
ranges = <0 2 0 0x100>;
|
|
};
|
|
};
|
|
|
|
&dspi {
|
|
bus-num = <0>;
|
|
status = "okay";
|
|
|
|
dflash0: n25q128a {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <1000000>; /* input clock */
|
|
};
|
|
|
|
dflash1: sst25wf040b {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "jedec,spi-nor";
|
|
spi-max-frequency = <3500000>;
|
|
reg = <1>;
|
|
};
|
|
|
|
dflash2: en25s64 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "jedec,spi-nor";
|
|
spi-max-frequency = <3500000>;
|
|
reg = <2>;
|
|
};
|
|
};
|
|
|
|
&qspi {
|
|
status = "okay";
|
|
|
|
s25fs512s0: flash@0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "jedec,spi-nor";
|
|
spi-max-frequency = <50000000>;
|
|
reg = <0>;
|
|
};
|
|
|
|
s25fs512s1: flash@1 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "jedec,spi-nor";
|
|
spi-max-frequency = <50000000>;
|
|
reg = <1>;
|
|
};
|
|
};
|
|
|
|
&sata {
|
|
status = "okay";
|
|
};
|