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2ac06f3e66
A385 controlcenterdc board does not use PCI DM properly and touches some PCIe devices directly in its board code. This controlcenterdc spl_board_init() function expects that PCIe link is already initialized. Link itself is initialized in a38x serdes code but this will change in future and link initialization will be postponed from U-Boot SPL to proper U-Boot. So explicitly enable PCIe link 2 in spl_board_init() function via SoC Control Register 1 to not break this code by future changes. This board has PCIe link 2 just x1, so no additional initialization (except enabling PCIe port) is needed. Signed-off-by: Pali Rohár <pali@kernel.org> |
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| .. | ||
| controlcenterdc.c | ||
| dt_helpers.c | ||
| dt_helpers.h | ||
| hre.c | ||
| hre.h | ||
| hydra.c | ||
| hydra.h | ||
| ihs_phys.c | ||
| ihs_phys.h | ||
| keyprogram.c | ||
| keyprogram.h | ||
| MAINTAINERS | ||
| Makefile | ||