mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-11 22:03:15 +00:00
984639039f
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org>
114 lines
3.1 KiB
Text
114 lines
3.1 KiB
Text
CONFIG_PPC=y
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CONFIG_TEXT_BASE=0xEFF40000
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CONFIG_ENV_SIZE=0x2000
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CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
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CONFIG_MPC85xx=y
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CONFIG_TARGET_T2080QDS=y
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CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
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CONFIG_ENABLE_36BIT_PHYS=y
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CONFIG_SYS_BOOK3E_HV=y
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CONFIG_SYS_CACHE_STASHING=y
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CONFIG_NXP_ESBC=y
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CONFIG_BOOTSCRIPT_HDR_ADDR=0xee020000
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CONFIG_PCIE1=y
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CONFIG_PCIE2=y
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CONFIG_PCIE3=y
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CONFIG_PCIE4=y
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CONFIG_FSL_USE_PCA9547_MUX=y
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CONFIG_VID=y
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CONFIG_VID_FLS_ENV="t208xqds_vdd_mv"
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CONFIG_VOL_MONITOR_IR36021_READ=y
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CONFIG_VOL_MONITOR_IR36021_SET=y
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CONFIG_SYS_FSL_NUM_CC_PLLS=2
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CONFIG_FSL_QIXIS=y
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# CONFIG_QIXIS_I2C_ACCESS is not set
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# CONFIG_SYS_MALLOC_F is not set
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CONFIG_MP=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_DYNAMIC_SYS_CLK_FREQ=y
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CONFIG_BOOTDELAY=10
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CONFIG_USE_BOOTCOMMAND=y
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CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
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CONFIG_BOARD_EARLY_INIT_R=y
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CONFIG_HUSH_PARSER=y
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CONFIG_SYS_PBSIZE=276
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CONFIG_CMD_IMLS=y
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CONFIG_CMD_GREPENV=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_MTDPARTS=y
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CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0"
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CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)"
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CONFIG_OF_CONTROL=y
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CONFIG_ENV_OVERWRITE=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_USE_BOOTFILE=y
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CONFIG_BOOTFILE="uImage"
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CONFIG_USE_ETHPRIME=y
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CONFIG_ETHPRIME="FM1@DTSEC3"
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CONFIG_FSL_SATA_V2=y
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CONFIG_SYS_SATA_MAX_DEVICE=2
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CONFIG_DYNAMIC_DDR_CLK_FREQ=y
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CONFIG_DIMM_SLOTS_PER_CTLR=2
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CONFIG_DDR_ECC=y
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CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
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CONFIG_DM_I2C=y
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CONFIG_SPL_SYS_I2C_LEGACY=y
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CONFIG_SYS_I2C_FSL=y
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CONFIG_SYS_FSL_I2C_OFFSET=0x118000
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CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
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CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
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CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
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CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
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CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
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CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
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CONFIG_SYS_I2C_EEPROM_ADDR=0x57
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CONFIG_FSL_ESDHC=y
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CONFIG_MTD=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_SYS_FLASH_EMPTY_INFO=y
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CONFIG_FLASH_CFI_MTD=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_SYS_FLASH_QUIET_TEST=y
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CONFIG_SYS_MAX_FLASH_SECT=1024
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CONFIG_SYS_MAX_FLASH_BANKS=2
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_SPEED=10000000
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CONFIG_SPI_FLASH_EON=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SPI_FLASH_SST=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_AQUANTIA=y
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CONFIG_PHY_REALTEK=y
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CONFIG_PHY_TERANETICS=y
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CONFIG_PHY_VITESSE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
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CONFIG_SYS_NS16550=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_FSL_ESPI=y
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CONFIG_USB=y
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CONFIG_USB_EHCI_FSL=y
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CONFIG_USB_MAX_CONTROLLER_COUNT=2
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CONFIG_USB_STORAGE=y
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CONFIG_ADDR_MAP=y
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CONFIG_SYS_NUM_ADDR_MAP=64
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CONFIG_RSA=y
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CONFIG_RSA_SOFTWARE_EXP=y
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