mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-05 02:51:00 +00:00
7400d34ba9
So far we used inline assembly to inject the actual instruction that triggers the semihosting service. While this sounds elegant, as it's really only about a few instructions, it has some serious downsides: - We need some barriers in place to force the compiler to issue writes to a data structure before issuing the trap instruction. - We need to convince the compiler to actually fill the structures that we use pointers to. - We need a memory clobber to avoid the compiler caching the data in those structures, when semihosting writes data back. - We need register arguments to make sure the function ID and the pointer land in the right registers. This is all doable, but fragile and somewhat cumbersome. Since we now have a separate function in an extra file anyway, we can do away with all the magic and just write that in an actual assembler. This is much more readable and robust. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Sean Anderson <sean.anderson@seco.com> |
||
---|---|---|
.. | ||
andes_plicsw.c | ||
asm-offsets.c | ||
boot.c | ||
bootm.c | ||
cache.c | ||
crt0_riscv_efi.S | ||
elf_riscv32_efi.lds | ||
elf_riscv64_efi.lds | ||
fdt_fixup.c | ||
image.c | ||
interrupts.c | ||
Makefile | ||
memcpy.S | ||
memmove.S | ||
memset.S | ||
reloc_riscv_efi.c | ||
reset.c | ||
sbi.c | ||
sbi_ipi.c | ||
semihosting.S | ||
setjmp.S | ||
sifive_cache.c | ||
sifive_clint.c | ||
smp.c | ||
spl.c |