mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-12 16:07:30 +00:00
7cf5597b84
With the move to using binman to generate SPL aka u-boot-spl-ddr.bin and U-Boot proper aka u-boot.itb every board now covers such configuration in its own U-Boot specific device tree include. Move the comon part of that configuration to the common imx8mm-u-boot.dtsi include file. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
114 lines
1.2 KiB
Text
114 lines
1.2 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2019 NXP
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*/
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#include "imx8mm-u-boot.dtsi"
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/ {
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wdt-reboot {
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compatible = "wdt-reboot";
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wdt = <&wdog1>;
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u-boot,dm-spl;
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};
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firmware {
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optee {
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compatible = "linaro,optee-tz";
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method = "smc";
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};
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};
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};
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®_usdhc2_vmmc {
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u-boot,off-on-delay-us = <20000>;
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};
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&pinctrl_reg_usdhc2_vmmc {
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u-boot,dm-spl;
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};
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&pinctrl_uart2 {
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u-boot,dm-spl;
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};
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&pinctrl_usdhc2_gpio {
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u-boot,dm-spl;
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};
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&pinctrl_usdhc2 {
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u-boot,dm-spl;
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};
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&pinctrl_usdhc3 {
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u-boot,dm-spl;
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};
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&gpio1 {
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u-boot,dm-spl;
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};
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&gpio2 {
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u-boot,dm-spl;
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};
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&gpio3 {
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u-boot,dm-spl;
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};
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&gpio4 {
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u-boot,dm-spl;
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};
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&gpio5 {
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u-boot,dm-spl;
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};
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&uart2 {
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u-boot,dm-spl;
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};
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&usdhc1 {
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u-boot,dm-spl;
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};
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&usdhc2 {
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u-boot,dm-spl;
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sd-uhs-sdr104;
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sd-uhs-ddr50;
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fsl,signal-voltage-switch-extra-delay-ms = <8>;
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};
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&usdhc3 {
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u-boot,dm-spl;
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mmc-hs400-1_8v;
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mmc-hs400-enhanced-strobe;
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};
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&i2c1 {
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u-boot,dm-spl;
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};
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&{/soc@0/bus@30800000/i2c@30a20000/pca9450@25} {
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u-boot,dm-spl;
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};
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&{/soc@0/bus@30800000/i2c@30a20000/pca9450@25/regulators} {
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u-boot,dm-spl;
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};
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&pinctrl_i2c1 {
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u-boot,dm-spl;
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};
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&pinctrl_pmic {
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u-boot,dm-spl;
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};
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&fec1 {
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phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
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};
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&wdog1 {
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u-boot,dm-spl;
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};
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