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https://github.com/AsahiLinux/u-boot
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c816dd0324
Update the labels of the nodes to match the kernel ones. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
58 lines
1.2 KiB
Text
58 lines
1.2 KiB
Text
// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* NXP LS1028A-QDS device tree fragment for RCW 7777
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*
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* Copyright 2019-2021 NXP
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*/
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/*
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* This setup is using a SCH-30841 card with AQR412 10G quad PHY.
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*
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* Switch ports are mapped 1:1 to AQR412 card ports seated in slot 1.
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* Bottom port is port 0.
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* Note that this is only usable for:
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* - QDS boards WITHOUT lane B rework,
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* - AQR412 card WITHOUT lane A -> lane C rework
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*
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* The following DTS assumes DIP SW5[1-3] = 000b.
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*/
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&slot1 {
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#include "fsl-sch-30841.dtsi"
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};
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&enetc_port2 {
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status = "okay";
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};
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&mscc_felix {
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status = "okay";
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};
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&mscc_felix_port0 {
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status = "okay";
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phy-mode = "2500base-x";
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phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@00}>;
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};
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&mscc_felix_port1 {
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status = "okay";
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phy-mode = "2500base-x";
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phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@01}>;
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};
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&mscc_felix_port2 {
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status = "okay";
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phy-mode = "2500base-x";
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phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
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};
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&mscc_felix_port3 {
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status = "okay";
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phy-mode = "2500base-x";
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phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@03}>;
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};
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&mscc_felix_port4 {
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ethernet = <&enetc_port2>;
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status = "okay";
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};
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