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7b2500babd
Bring in required device clock binding files from Linux. The clock trees for rk3066 and rk3188 are largely similar, which makes them share the common parts in a shared header. While we focus on rk3188 for now, bring in both headers already for completeness sake. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
48 lines
971 B
C
48 lines
971 B
C
/*
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* Copyright (c) 2014 MundoReader S.L.
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* Author: Heiko Stuebner <heiko@sntech.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H
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#define _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H
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#include <dt-bindings/clock/rk3188-cru-common.h>
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/* soft-reset indices */
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#define SRST_PTM_CORE2 0
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#define SRST_PTM_CORE3 1
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#define SRST_CORE2 5
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#define SRST_CORE3 6
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#define SRST_CORE2_DBG 10
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#define SRST_CORE3_DBG 11
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#define SRST_TIMER2 16
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#define SRST_TIMER4 23
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#define SRST_I2S0 24
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#define SRST_TIMER5 25
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#define SRST_TIMER3 29
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#define SRST_TIMER6 31
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#define SRST_PTM3 36
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#define SRST_PTM3_ATB 37
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#define SRST_GPS 67
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#define SRST_HSICPHY 75
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#define SRST_TIMER 78
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#define SRST_PTM2 92
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#define SRST_CORE2_WDT 94
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#define SRST_CORE3_WDT 95
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#define SRST_PTM2_ATB 111
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#define SRST_HSIC 117
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#define SRST_CTI2 118
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#define SRST_CTI2_APB 119
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#define SRST_GPU_BRIDGE 121
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#define SRST_CTI3 123
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#define SRST_CTI3_APB 124
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#endif
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