mirror of
https://github.com/AsahiLinux/u-boot
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24956642ef
This patch removes the completely unused CONFIG_SERIAL_SOFTWARE_FIFO feature from U-Boot. It has only been implemented for PPC4xx and was not used at all. So let's remove it and make the code smaller and cleaner. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Detlev Zundel <dzu@denx.de>
281 lines
9.9 KiB
C
281 lines
9.9 KiB
C
/*
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*(C) Copyright 2005-2007 Netstal Maschinen AG
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* Niklaus Giger (Niklaus.Giger@netstal.com)
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/************************************************************************
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* mcu25.h - configuration for MCU25 board (similar to hcu4.h)
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***********************************************************************/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*-----------------------------------------------------------------------
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* High Level Configuration Options
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*----------------------------------------------------------------------*/
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#define CONFIG_MCU25 1 /* Board is MCU25 */
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#define CONFIG_4xx 1 /* ... PPC4xx family */
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#define CONFIG_405GP 1
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#define CONFIG_4xx 1
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#define CONFIG_HOSTNAME mcu25
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/*
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* Include common defines/options for all boards produced by Netstal Maschinen
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*/
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#include "netstal-common.h"
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#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
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#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
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/*-----------------------------------------------------------------------
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* Base addresses -- Note these are effective addresses where the
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* actual resources get mapped (not physical addresses)
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*----------------------------------------------------------------------*/
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#define CONFIG_SYS_MONITOR_LEN (320 * 1024) /* Reserve 320 kB for Monitor */
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#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */
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#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
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#define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */
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#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
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/* ... with on-chip memory here (4KBytes) */
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#define CONFIG_SYS_OCM_DATA_ADDR 0xF4000000
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#define CONFIG_SYS_OCM_DATA_SIZE 0x00001000
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/* Do not set up locked dcache as init ram. */
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#undef CONFIG_SYS_INIT_DCACHE_CS
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/* Use the On-Chip-Memory (OCM) as a temporary stack for the startup code. */
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#define CONFIG_SYS_TEMP_STACK_OCM 1
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#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* OCM */
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#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE
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#define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data */
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#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
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/*-----------------------------------------------------------------------
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* Serial Port
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*----------------------------------------------------------------------*/
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/*
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* If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1.
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* If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31.
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* Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value.
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* The Linux BASE_BAUD define should match this configuration.
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* baseBaud = cpuClock/(uartDivisor*16)
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* If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
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* set Linux BASE_BAUD to 403200.
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*/
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#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
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#define CONFIG_SYS_BASE_BAUD 691200
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/* Set console baudrate to 9600 */
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#define CONFIG_BAUDRATE 9600
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/*-----------------------------------------------------------------------
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* Flash
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*----------------------------------------------------------------------*/
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/* Use common CFI driver */
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER
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/* board provides its own flash_init code */
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#define CONFIG_FLASH_CFI_LEGACY 1
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#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
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#define CONFIG_SYS_FLASH_LEGACY_512Kx8 1
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/* print 'E' for empty sector on flinfo */
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#define CONFIG_SYS_FLASH_EMPTY_INFO
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CONFIG_SYS_MAX_FLASH_SECT 8 /* max number of sectors on one chip */
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/*-----------------------------------------------------------------------
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* Environment
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*----------------------------------------------------------------------*/
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#undef CONFIG_ENV_IS_IN_NVRAM
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#define CONFIG_ENV_IS_IN_FLASH
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#undef CONFIG_ENV_IS_NOWHERE
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#ifdef CONFIG_ENV_IS_IN_EEPROM
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/* Put the environment after the SDRAM configuration */
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#define PROM_SIZE 2048
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#define CONFIG_ENV_OFFSET 512
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#define CONFIG_ENV_SIZE (PROM_SIZE-CONFIG_ENV_OFFSET)
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#endif
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#ifdef CONFIG_ENV_IS_IN_FLASH
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/* Put the environment in Flash */
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#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
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#define CONFIG_ENV_ADDR ((-CONFIG_SYS_MONITOR_LEN)-CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_SIZE 8*1024 /* 8 KB Environment Sector */
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/* Address and size of Redundant Environment Sector */
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#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
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#endif
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/*-----------------------------------------------------------------------
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* I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the
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* the first internal I2C controller of the PPC440EPx
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*----------------------------------------------------------------------*/
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#define CONFIG_SYS_SPD_BUS_NUM 0
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/* Setup some board specific values for the default environment variables */
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#define CONFIG_IPADDR 172.25.1.25
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#define CONFIG_EXTRA_ENV_SETTINGS \
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CONFIG_NETSTAL_DEF_ENV \
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CONFIG_NETSTAL_DEF_ENV_POWERPC \
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""
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_ASKENV
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_DIAG
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#define CONFIG_CMD_EEPROM
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#define CONFIG_CMD_ELF
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#define CONFIG_CMD_FLASH
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#define CONFIG_CMD_I2C
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#define CONFIG_CMD_IMMAP
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#define CONFIG_CMD_IRQ
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_REGINFO
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#define CONFIG_CMD_SDRAM
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/* SPD EEPROM (sdram speed config) disabled */
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#define CONFIG_SPD_EEPROM 1
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#define SPD_EEPROM_ADDRESS 0x50
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/* POST support */
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#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \
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CONFIG_SYS_POST_CPU | \
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CONFIG_SYS_POST_UART | \
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CONFIG_SYS_POST_I2C | \
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CONFIG_SYS_POST_CACHE | \
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CONFIG_SYS_POST_ETHER | \
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CONFIG_SYS_POST_SPR)
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#define CONFIG_SYS_POST_UART_TABLE {UART0_BASE}
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#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
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#undef CONFIG_LOGBUFFER
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#define CONFIG_SYS_POST_CACHE_ADDR 0x00800000 /* free virtual address */
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
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/*-----------------------------------------------------------------------
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* Miscellaneous configurable options
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*----------------------------------------------------------------------*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
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#if defined(CONFIG_CMD_KGDB)
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
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#else
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#endif
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
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#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
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/*-----------------------------------------------------------------------
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* External Bus Controller (EBC) Setup
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*/
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#define CONFIG_SYS_EBC_CFG 0x98400000
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/* Memory Bank 0 (Flash Bank 0) initialization */
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#define CONFIG_SYS_EBC_PB0AP 0x02005400
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#define CONFIG_SYS_EBC_PB0CR 0xFFF18000 /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit*/
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#define CONFIG_SYS_EBC_PB1AP 0x03041200
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#define CONFIG_SYS_EBC_PB1CR 0x7009A000 /* BAS=,BS=MB,BU=R/W,BW=bit */
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#define CONFIG_SYS_EBC_PB2AP 0x01845200u /* BAS=,BS=MB,BU=R/W,BW=bit */
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#define CONFIG_SYS_EBC_PB2CR 0x7A09A000u
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#define CONFIG_SYS_EBC_PB3AP 0x01845200u /* BAS=,BS=MB,BU=R/W,BW=bit */
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#define CONFIG_SYS_EBC_PB3CR 0x7B09A000u
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#define CONFIG_SYS_EBC_PB4AP 0x01845200u /* BAS=,BS=MB,BU=R/W,BW=bit */
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#define CONFIG_SYS_EBC_PB4CR 0x7C09A000u
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#define CONFIG_SYS_EBC_PB5AP 0x00800200u
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#define CONFIG_SYS_EBC_PB5CR 0x7D81A000u
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#define CONFIG_SYS_EBC_PB6AP 0x01040200u
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#define CONFIG_SYS_EBC_PB6CR 0x7D91A000u
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#define CONFIG_SYS_GPIO0_OR 0x087FFFFF /* GPIO value */
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#define CONFIG_SYS_GPIO0_TCR 0x7FFF8000 /* GPIO value */
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#define CONFIG_SYS_GPIO0_ODR 0xFFFF0000 /* GPIO value */
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 8 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization.
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*/
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#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
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/* Init Memory Controller:
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*
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* BR0/1 and OR0/1 (FLASH)
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*/
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#define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */
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#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
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/* Configuration Port location */
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#define CONFIG_PORT_ADDR 0xF0000500
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#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
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#ifdef CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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#endif
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#if defined(CONFIG_CMD_KGDB)
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#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
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#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
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#endif
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#endif /* __CONFIG_H */
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