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https://github.com/AsahiLinux/u-boot
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28c935b5ee
Remove unused PCIe functions from SerDes code. They are unused and are duplicated either from generic PCIe code or from pci_mvebu.c. Remove also unused PCIe macros from SerDes code. They are just obfuscated variants of standards macros in include/pci.h or in pci_mvebu.c. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
64 lines
1.3 KiB
C
64 lines
1.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) Marvell International Ltd. and its affiliates
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*/
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#include <common.h>
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#include <spl.h>
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#include <asm/io.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/soc.h>
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#include <linux/bitops.h>
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#include <linux/delay.h>
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#include "ctrl_pex.h"
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#include "sys_env_lib.h"
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__weak void board_pex_config(void)
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{
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/* nothing in this weak default implementation */
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}
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int hws_pex_config(const struct serdes_map *serdes_map, u8 count)
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{
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enum serdes_type serdes_type;
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u32 idx, tmp;
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DEBUG_INIT_FULL_S("\n### hws_pex_config ###\n");
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tmp = reg_read(SOC_CONTROL_REG1);
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tmp &= ~0x03;
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for (idx = 0; idx < count; idx++) {
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serdes_type = serdes_map[idx].serdes_type;
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if ((serdes_type != PEX0) &&
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((serdes_map[idx].serdes_mode == PEX_ROOT_COMPLEX_X4) ||
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(serdes_map[idx].serdes_mode == PEX_END_POINT_X4))) {
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/* for PEX by4 - relevant for the first port only */
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continue;
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}
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switch (serdes_type) {
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case PEX0:
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tmp |= 0x1 << PCIE0_ENABLE_OFFS;
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break;
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case PEX1:
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tmp |= 0x1 << PCIE1_ENABLE_OFFS;
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break;
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case PEX2:
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tmp |= 0x1 << PCIE2_ENABLE_OFFS;
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break;
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case PEX3:
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tmp |= 0x1 << PCIE3_ENABLE_OFFS;
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break;
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default:
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break;
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}
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}
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reg_write(SOC_CONTROL_REG1, tmp);
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board_pex_config();
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return MV_OK;
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}
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