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38d1a18750
Add properties related to eMMC HS400 mode for esdhc1. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
32 lines
589 B
Text
32 lines
589 B
Text
// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* NXP LX2162AQDS device tree source for the SERDES block #1 - protocol 20
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*
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* Some assumptions are made:
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* * Mezzanine card M8 is connected to IO SLOT1
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* (xlaui4 for DPMAC 1)
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*
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* Copyright 2020-2021 NXP
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*
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*/
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#include "fsl-lx2160a-qds.dtsi"
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&dpmac1 {
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status = "okay";
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phy-handle = <&cortina_phy1_0>;
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phy-connection-type = "xlaui4";
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};
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&emdio1_slot1 {
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cortina_phy1_0: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c45";
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reg = <0x0>;
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};
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};
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&esdhc1 {
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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bus-width = <8>;
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};
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