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70f24fa02b
Copy the devicetree source for the A10s/A13/GR8, A31(s), and A23/A33/R16 SoCs and all existing boards from the Linux v5.18-rc1 tag. These changes are combined into one commit due to interdependencies: - The unit addresses were removed from bitbanged I2C buses, which drives a Kconfig default change. This affects sun5i-a13-utoo-p66.dts and sun6i-a31-colombus.dts. - The pinctrl nodes were renamed, including some used by the shared header sunxi-reference-design-tablet.dtsi. To maintain ABI compatibility with existing LTS kernels, one change moving some IP blocks to the r_intc interrupt controller is excluded. This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2. This commit renames the file sun8i-r16-nintendo-nes-classic-edition.dts to sun8i-r16-nintendo-nes-classic.dts to match the Linux tree. This commit also adds the following new board devicetrees: - sun5i-a13-licheepi-one.dts - sun5i-a13-pocketbook-touch-lux-3.dts - sun5i-gr8-evb.dts - sun8i-a23-ippo-q8h-v1.2.dts - sun8i-a23-ippo-q8h-v5.dts - sun8i-a33-et-q8-v1.6.dts - sun8i-a33-ippo-q8h-v1.2.dts - sun8i-r16-nintendo-super-nes-classic.dts As with the other SoCs, updates of note are conversion of GPIO pull-up from pinconf to GPIO flags and renaming the detection GPIO properties in the USB PHY nodes. Signed-off-by: Samuel Holland <samuel@sholland.org>
141 lines
3.7 KiB
Text
141 lines
3.7 KiB
Text
/*
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* Copyright 2015 Chen-Yu Tsai <wens@csie.org>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "sun6i-a31s.dtsi"
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#include "sunxi-common-regulators.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Sinlinx SinA31s Core Board";
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compatible = "sinlinx,sina31s", "allwinner,sun6i-a31s";
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aliases {
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serial0 = &uart0;
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};
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};
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&cpu0 {
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cpu-supply = <®_dcdc3>;
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};
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/* eMMC on core board */
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&mmc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc3_8bit_emmc_pins>;
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vmmc-supply = <®_dcdc1>;
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vqmmc-supply = <®_dcdc1>;
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bus-width = <8>;
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non-removable;
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cap-mmc-hw-reset;
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status = "okay";
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};
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/* AXP221s PMIC on core board */
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&p2wi {
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status = "okay";
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axp22x: pmic@68 {
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compatible = "x-powers,axp221";
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reg = <0x68>;
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interrupt-parent = <&r_intc>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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};
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};
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#include "axp22x.dtsi"
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®_aldo3 {
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regulator-always-on;
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regulator-min-microvolt = <2700000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "avcc";
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};
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®_dc5ldo {
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1320000>;
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regulator-name = "vdd-cpus";
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};
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®_dcdc1 {
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regulator-always-on;
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-name = "vcc-3v0";
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};
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®_dcdc2 {
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1320000>;
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regulator-name = "vdd-gpu";
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};
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®_dcdc3 {
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regulator-always-on;
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1320000>;
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regulator-name = "vdd-cpu";
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};
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®_dcdc4 {
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regulator-always-on;
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1320000>;
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regulator-name = "vdd-sys-dll";
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};
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®_dcdc5 {
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regulator-always-on;
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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regulator-name = "vcc-dram";
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};
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/* UART0 pads available on core board */
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_ph_pins>;
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status = "okay";
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};
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