mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-09-28 18:32:08 +00:00
f5dd0c5e19
A number of CONFIG symbols have crept in that are never referenced in code, so drop them here. Further, we have two symbols being enabled in headers while already enabled correctly in Kconfig, so these lines can also be removed. Signed-off-by: Tom Rini <trini@konsulko.com>
81 lines
1.9 KiB
C
81 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2017 NXP
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* Copyright 2018 Emcraft Systems
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* Copyright 2022 Purism
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*
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*/
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#ifndef __LIBREM5_H
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#define __LIBREM5_H
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/* #define DEBUG */
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#include <version.h>
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#include <linux/sizes.h>
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#include <asm/arch/imx-regs.h>
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#define CFG_SYS_FSL_USDHC_NUM 2
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#define CONSOLE_ON_UART1
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#ifdef CONSOLE_ON_UART1
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#define CFG_MXC_UART_BASE UART1_BASE_ADDR
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#define CONSOLE_UART_CLK 0
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#define CONSOLE "ttymxc0"
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#elif defined(CONSOLE_ON_UART2)
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#define CFG_MXC_UART_BASE UART2_BASE_ADDR
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#define CONSOLE_UART_CLK 1
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#define CONSOLE "ttymxc1"
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#elif defined(CONSOLE_ON_UART3)
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#define CFG_MXC_UART_BASE UART3_BASE_ADDR
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#define CONSOLE_UART_CLK 2
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#define CONSOLE "ttymxc2"
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#elif defined(CONSOLE_ON_UART4)
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#define CFG_MXC_UART_BASE UART4_BASE_ADDR
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#define CONSOLE_UART_CLK 3
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#define CONSOLE "ttymxc3"
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#else
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#define CFG_MXC_UART_BASE UART1_BASE_ADDR
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#define CONSOLE_UART_CLK 0
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#define CONSOLE "ttymxc0"
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#endif
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#ifndef CONFIG_SPL_BUILD
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 0) \
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func(USB, usb, 0) \
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func(DHCP, dhcp, na)
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#include <config_distro_bootcmd.h>
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#else
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#define BOOTENV
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#endif
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/* Initial environment variables */
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#define CFG_EXTRA_ENV_SETTINGS \
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"scriptaddr=0x80000000\0" \
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"pxefile_addr_r=0x80100000\0" \
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"kernel_addr_r=0x80800000\0" \
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"fdt_addr_r=0x84800000\0" \
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"ramdisk_addr_r=0x85000000\0" \
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"console=" CONSOLE ",115200\0" \
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"bootargs=u_boot_version=" PLAIN_VERSION "\0" \
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"stdin=usbacm,serial\0" \
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"stdout=usbacm,serial\0" \
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"stderr=usbacm,serial\0" \
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BOOTENV
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/* Link Definitions */
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#define CFG_SYS_INIT_RAM_ADDR 0x40000000
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#define CFG_SYS_INIT_RAM_SIZE 0x80000
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#define CFG_SYS_SDRAM_BASE 0x40000000
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE 0xc0000000 /* 3GB LPDDR4 one Rank */
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/* Monitor Command Prompt */
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#define CFG_SYS_FSL_ESDHC_ADDR 0
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#endif
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