mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-27 07:01:24 +00:00
ab68790798
The pins for async memory where parallel flash lives are not enabled by default, so make sure we mux them as needed. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
164 lines
3.6 KiB
C
164 lines
3.6 KiB
C
/*
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* U-boot - main board file
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*
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* Copyright (c) 2008-2009 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <common.h>
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#include <config.h>
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#include <command.h>
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#include <net.h>
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#include <netdev.h>
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#include <spi.h>
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#include <asm/blackfin.h>
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#include <asm/net.h>
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#include <asm/mach-common/bits/otp.h>
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DECLARE_GLOBAL_DATA_PTR;
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int checkboard(void)
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{
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printf("Board: ADI BF518F EZ-Board board\n");
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printf(" Support: http://blackfin.uclinux.org/\n");
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return 0;
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}
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phys_size_t initdram(int board_type)
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{
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
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return gd->bd->bi_memsize;
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}
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#if defined(CONFIG_BFIN_MAC)
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static void board_init_enetaddr(uchar *mac_addr)
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{
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bool valid_mac = false;
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#if 0
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/* the MAC is stored in OTP memory page 0xDF */
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uint32_t ret;
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uint64_t otp_mac;
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ret = bfrom_OtpRead(0xDF, OTP_LOWER_HALF, &otp_mac);
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if (!(ret & OTP_MASTER_ERROR)) {
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uchar *otp_mac_p = (uchar *)&otp_mac;
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for (ret = 0; ret < 6; ++ret)
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mac_addr[ret] = otp_mac_p[5 - ret];
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if (is_valid_ether_addr(mac_addr))
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valid_mac = true;
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}
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#endif
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if (!valid_mac) {
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puts("Warning: Generating 'random' MAC address\n");
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bfin_gen_rand_mac(mac_addr);
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}
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eth_setenv_enetaddr("ethaddr", mac_addr);
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}
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#define KSZ_MAX_HZ 5000000
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#define KSZ_WRITE 0x02
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#define KSZ_READ 0x03
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#define KSZ_REG_STPID 0x01 /* Register 1: Chip ID1 / Start Switch */
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#define KSZ_REG_GC9 0x0b /* Register 11: Global Control 9 */
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#define KSZ_REG_P3C0 0x30 /* Register 48: Port 3 Control 0 */
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static int ksz8893m_transfer(struct spi_slave *slave, uchar dir, uchar reg,
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uchar data, uchar result[3])
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{
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unsigned char dout[3] = { dir, reg, data, };
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return spi_xfer(slave, sizeof(dout) * 8, dout, result, SPI_XFER_BEGIN | SPI_XFER_END);
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}
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static int ksz8893m_reg_set(struct spi_slave *slave, uchar reg, uchar data)
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{
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unsigned char din[3];
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return ksz8893m_transfer(slave, KSZ_WRITE, reg, data, din);
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}
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static int ksz8893m_reg_clear(struct spi_slave *slave, uchar reg, uchar mask)
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{
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int ret = 0;
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unsigned char din[3];
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ret |= ksz8893m_transfer(slave, KSZ_READ, reg, 0, din);
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ret |= ksz8893m_reg_set(slave, reg, din[2] & mask);
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return ret;
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}
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static int ksz8893m_reset(struct spi_slave *slave)
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{
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int ret = 0;
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/* Disable STPID mode */
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ret |= ksz8893m_reg_clear(slave, KSZ_REG_GC9, 0x01);
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/* Disable VLAN tag insert on Port3 */
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ret |= ksz8893m_reg_clear(slave, KSZ_REG_P3C0, 0x04);
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/* Start switch */
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ret |= ksz8893m_reg_set(slave, KSZ_REG_STPID, 0x01);
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return ret;
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}
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int board_eth_init(bd_t *bis)
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{
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static bool switch_is_alive = false;
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int ret;
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if (!switch_is_alive) {
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struct spi_slave *slave = spi_setup_slave(0, 1, KSZ_MAX_HZ, SPI_MODE_3);
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if (slave) {
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if (!spi_claim_bus(slave)) {
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ret = ksz8893m_reset(slave);
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if (!ret)
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switch_is_alive = true;
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spi_release_bus(slave);
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}
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spi_free_slave(slave);
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}
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}
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if (switch_is_alive)
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return bfin_EMAC_initialize(bis);
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else
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return -1;
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}
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#endif
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int misc_init_r(void)
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{
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#ifdef CONFIG_BFIN_MAC
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uchar enetaddr[6];
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if (!eth_getenv_enetaddr("ethaddr", enetaddr))
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board_init_enetaddr(enetaddr);
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#endif
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return 0;
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}
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int board_early_init_f(void)
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{
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#if !defined(CONFIG_SYS_NO_FLASH)
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/* setup BF518-EZBRD GPIO pin PG11 to AMS2. */
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bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_6_MASK) | PORT_x_MUX_6_FUNC_2);
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bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG11);
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# if !defined(CONFIG_BFIN_SPI)
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/* setup BF518-EZBRD GPIO pin PG15 to AMS3. */
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bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_7_MASK) | PORT_x_MUX_7_FUNC_3);
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bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG15);
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# endif
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#endif
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return 0;
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}
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