mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 02:38:56 +00:00
65513f3c18
During the migration to a single DTSI for the CP110-s specific pinctrl
compatibles were moved to the SoC DTSI as CP0 and CP1 have some specifics.
Namely, CP0 eMMC/SDIO support depends on the mvebu-pinctrl driver setting
the BIT(0) in eMMC PHY IO Control 0 Register to 0 in order for the connect
the eMMC/SDIO PHY to the controller and not use it as a MPP pin multiplexor.
So, the mvebu-pinctrl driver check specifically for the
"marvell,armada-8k-cpm-pinctrl" compatible to clear the that bit.
Issue is that compatibles in the 8040 DTSI were set to "marvell,8k-cpm-pinctrl"
for CP0 and "marvell,8k-cps-pinctrl" for the CP1.
This is obviously incorrect as the pinctrl driver does not know about these.
So fix the regression by applying correct compatibles to the DTSI.
Regression found and tested on the Puzzle M801 board.
Fixes: a0ba97e5 ("arm: armada: dts: Use a single dtsi for cp110 die description")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
89 lines
1.9 KiB
Text
89 lines
1.9 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright (C) 2016- 2021 Marvell International Ltd.
|
|
*/
|
|
|
|
/*
|
|
* Device Tree file for the Armada 8040 SoC, made of an AP806 Quad and
|
|
* two CP110.
|
|
*/
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include "armada-common.dtsi"
|
|
#include "armada-8k.dtsi"
|
|
#include "armada-ap806.dtsi"
|
|
#include "armada-ap80x-quad.dtsi"
|
|
|
|
/* CP110-0 Settings */
|
|
#define CP110_NAME cp0
|
|
#define CP110_NUM 0
|
|
|
|
#include "armada-cp110.dtsi"
|
|
|
|
#undef CP110_NAME
|
|
#undef CP110_NUM
|
|
|
|
/* CP110-1 Settings */
|
|
#define CP110_NAME cp1
|
|
#define CP110_NUM 1
|
|
|
|
#include "armada-cp110.dtsi"
|
|
|
|
#undef CP110_NAME
|
|
#undef CP110_NUM
|
|
|
|
|
|
/ {
|
|
model = "Marvell Armada 8040";
|
|
compatible = "marvell,armada8040", "marvell,armada-ap806-quad",
|
|
"marvell,armada-ap806";
|
|
};
|
|
|
|
&cp0_pinctl {
|
|
compatible = "marvell,mvebu-pinctrl", "marvell,armada-8k-cpm-pinctrl";
|
|
bank-name ="cp0-110";
|
|
|
|
cp0_i2c0_pins: cp0-i2c-pins-0 {
|
|
marvell,pins = < 37 38 >;
|
|
marvell,function = <2>;
|
|
};
|
|
cp0_i2c1_pins: cp0-i2c-pins-1 {
|
|
marvell,pins = < 35 36 >;
|
|
marvell,function = <2>;
|
|
};
|
|
cp0_ge1_rgmii_pins: cp0-ge-rgmii-pins-0 {
|
|
marvell,pins = < 0 1 2 3 4 5 6 7 8 9 10 11>;
|
|
marvell,function = <3>;
|
|
};
|
|
cp0_ge2_rgmii_pins: cp0-ge-rgmii-pins-1 {
|
|
marvell,pins = < 44 45 46 47 48 49 50 51
|
|
52 53 54 55 >;
|
|
marvell,function = <1>;
|
|
};
|
|
cp0_pca0_pins: cp0-pca0_pins {
|
|
marvell,pins = <62>;
|
|
marvell,function = <0>;
|
|
};
|
|
cp0_sdhci_pins: cp0-sdhi-pins-0 {
|
|
marvell,pins = < 56 57 58 59 60 61 >;
|
|
marvell,function = <14>;
|
|
};
|
|
cp0_spi0_pins: cp0-spi-pins-0 {
|
|
marvell,pins = < 13 14 15 16 >;
|
|
marvell,function = <3>;
|
|
};
|
|
};
|
|
|
|
&cp1_pinctl {
|
|
compatible = "marvell,mvebu-pinctrl", "marvell,armada-8k-cps-pinctrl";
|
|
bank-name ="cp1-110";
|
|
|
|
cp1_ge1_rgmii_pins: cp1-ge-rgmii-pins-0 {
|
|
marvell,pins = < 0 1 2 3 4 5 6 7 8 9 10 11 >;
|
|
marvell,function = <3>;
|
|
};
|
|
cp1_spi1_pins: cp1-spi-pins-1 {
|
|
marvell,pins = < 13 14 15 16 >;
|
|
marvell,function = <3>;
|
|
};
|
|
};
|